Semiconductor device, light emitting apparatus and electronic device

• US 8,410,482 B2
• Filed: 03/30/2011
• Issued: 04/02/2013
• Est. Priority Date: 03/31/2010
• Status: Active Grant

• Current Assignee: Solas OLED Limited (Atlantic IP Services Limited)
• Original Assignee: Casio Computer Company Limited
• Inventors: Tanaka, Yukikazu, Matsuda, Kunihiro, Matsumoto, Hiroshi
• Primary Examiner(s): Tran, Long
• Assistant Examiner(s): Tran, Dzung
• Application Number:
  US13/075,411
• Publication Number:
  US 20110241002A1
• Time in Patent Office: 734 Days
• Field of Search: 257/83, 257/184, 257/257, 257/290
• US Class Current: 257/59
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs

Abstract

Disclosed in a semiconductor device including a substrate, a first transistor, a second transistor, and a first source electrode and a first drain electrode of the first transistor are arranged along a first direction and a second source electrode and a second drain electrode of the second transistor are arranged in a reverse order of the first source electrode and the first drain electrode along the first direction, the first source electrode and the second source electrode are connected by a source connecting wiring, the first drain electrode and the second drain electrode are connected by a drain connecting wiring, a first gate electrode and a second gate electrode are connected by a gate connecting wiring and the source connecting wiring and the drain connecting wiring are provided at positions except a region overlapped with the first gate electrode, the second gate electrode and the gate connecting wiring.

Claims

1. A semiconductor device, comprising:

a substrate;

a first transistor which is provided on an upper surface of the substrate and which comprises a first source electrode, a first drain electrode and a first gate electrode;

a second transistor which is provided on the upper surface of the substrate and which comprises a second source electrode, a second drain electrode and a second gate electrode, wherein the second transistor is of a same conductive type as the first transistor;

a source connecting wiring which electrically connects the first source electrode and the second source electrode;

a drain connecting wiring which electrically connects the first drain electrode and the second drain electrode; and

a gate connecting wiring which electrically connects the first gate electrode and the second gate electrode,

wherein the first source electrode and the first drain electrode are arranged along a first direction and the second source electrode and the second drain electrode are arranged along the first direction in a reverse order from an order of the first source electrode and the first drain electrode along the first direction,

wherein the source connecting wiring and the drain connecting wiring are provided at positions except a region overlapped with the first gate electrode, the second gate electrode and the gate connecting wiring, and

wherein one of the source connecting wiring and the drain connecting wiring includes a region which overlaps planarly with the other of the source connecting wiring and the drain connecting wiring via an insulation film.

2. The semiconductor device according to claim 1, wherein the first transistor and the second transistor are provided on the substrate so as to be adjacent to each other along a second direction orthogonal to the first direction, and

wherein the first gate electrode, the second gate electrode and the gate connecting wiring are formed as a single conductor layer formed in one layer on the substrate.

3. The semiconductor device according to claim 1, wherein one of the source connecting wiring and the drain connecting wiring comprises a first connecting wiring and a second connecting wiring that is provided in a layer different from a layer in which the first connecting wiring is provided and that is electrically connected to the first connecting wiring, and

wherein other of the source connecting wiring and the drain connecting wiring comprises a third connecting wiring which is provided, via an insulating film, in a layer different from one of the layer in which the first connecting wiring is provided and the layer in which the second connecting wiring is provided.

4. The semiconductor device according to claim 3, wherein the first connecting wiring is a conductor layer provided in the same layer as the first source electrode and the second source electrode or the same layer as the first drain electrode and the second drain electrode,

wherein the second connecting wiring is a conductor layer provided on a lower layer side of the layer of the first source electrode and the second source electrode or the layer of the first drain electrode and the second drain electrode via the insulating film, and

wherein the third connecting wiring is a conductor layer provided in the same layer as the first source electrode and the second source electrode or the same layer as the first drain electrode and the second drain electrode.

5. The semiconductor device according to claim 4, wherein the first transistor and the second transistor are thin film transistors having an inverted-stagger structure, and the second connecting wiring is the conductor layer provided in the same layer as the first gate electrode and the second gate electrode.

6. The semiconductor device according to claim 3, wherein the first connecting wiring is a conductor layer provided on an upper layer side of a layer of the first source electrode and the second source electrode or a layer of the first drain electrode and the second drain electrode, and

wherein the third connecting wiring is a conductor layer provided in the same layer as the first source electrode and the second source electrode or the same layer as the first drain electrode and the second drain electrode.

7. The semiconductor device according to claim 1, wherein the first transistor and the second transistor are thin film transistors having an inverted-stagger structure.

8. A light emitting apparatus comprising a plurality of pixels arranged on a substrate, wherein each of the plurality of pixels comprises a light emitting device and a drive device which is connected to the light emitting device to drive the light emitting device, wherein the drive device comprises:

a first transistor which is provided on an upper surface of the substrate and which comprises a first source electrode, a first drain electrode and a first gate electrode;

a second transistor which is provided on the upper surface of the substrate and which comprises a second source electrode, a second drain electrode and a second gate electrode, wherein the second transistor is of a same conductive type as the first transistor;

a source connecting wiring which electrically connects the first source electrode and the second source electrode;

a drain connecting wiring which electrically connects the first drain electrode and the second drain electrode; and

a gate connecting wiring which electrically connects the first gate electrode and the second gate electrode,

wherein the first source electrode and the first drain electrode are arranged along a first direction and the second source electrode and the second drain electrode are arranged along the first direction in a reverse order from an order of the first source electrode and the first drain electrode along the first direction,

wherein the source connecting wiring and the drain connecting wiring are provided at positions except a region overlapped with the first gate electrode, the second gate electrode and the gate connecting wiring, and

wherein one of the source connecting wiring and the drain connecting wiring includes a region which overlaps planarly with the other of the source connecting wiring and the drain connecting wiring via an insulation film.

9. The light emitting apparatus according to claim 8, wherein the first transistor and the second transistor are provided on the substrate so as to be adjacent to each other along a second direction orthogonal to the first direction, and

wherein the first gate electrode, the second gate electrode and the gate connecting wiring are formed as a single conductor layer formed in one layer on the substrate.

10. The light emitting apparatus according to claim 8, wherein one of the source connecting wiring and the drain connecting wiring comprises a first connecting wiring and a second connecting wiring that is provided in a layer different from a layer in which the first connecting wiring is provided and that is electrically connected to the first connecting wiring, and

wherein the other of the source connecting wiring and the drain connecting wiring comprises a third connecting wiring which is provided, via an insulating film, in a layer different from one of the layer in which the first connecting wiring is provided and the layer in which the second connecting wiring is provided.

11. The light emitting apparatus according to claim 10, wherein the first connecting wiring is a conductor layer provided in the same layer as the first source electrode and the second source electrode or in the same layer as the first drain electrode and the second drain electrode,

wherein the second connecting wiring is a conductor layer provided on a lower layer side of the layer of the first source electrode and the second source electrode or the layer of the first drain electrode and the second drain electrode via the insulating film, and

wherein the third connecting wiring is a conductor layer provided in the same layer as the first source electrode and the second source electrode or the same as the layer as the first drain electrode and the second drain electrode.

12. The light emitting apparatus according to claim 11, wherein the first transistor and the second transistor are thin film transistors having an inverted-stagger structure, and

wherein the second connecting wiring is a conductor layer provided in the same layer as the first gate electrode and the second gate electrode.

13. The light emitting apparatus according to claim 10, wherein the first connecting wiring is a conductor layer provided on an upper layer side of a layer of the first source electrode and the second source electrode or a layer of the first drain electrode and the second drain electrode, and

wherein the third connecting wiring is a conductor layer provided in the same layer as the first source electrode and the second source electrode or the same layer as the first drain electrode and the second drain electrode.

14. The light emitting apparatus according to claim 13, further comprising a plurality of data lines provided on the substrate to supply a drive signal to each of the plurality of pixels by being respectively connected to each of the plurality of pixels,

wherein the first connecting wiring is the conductor layer provided in the same layer as the data lines.

15. The light emitting apparatus according to claim 14, further comprising a plurality of power lines to supply a drive voltage to each of the plurality of pixels, the power lines being provided more on a lower layer side than the data lines and respectively being connected to each of the plurality of pixels,

wherein the second connecting wiring is the power lines.

16. The light emitting apparatus according to claim 8, wherein the light emitting device is an organic electro luminescence device.

17. An electronic device, comprising:

an electronic device main body; and

a light emitting apparatus to which image data is supplied from the electronic device main body and which is driven according to the image data,

wherein the light emitting apparatus comprises a substrate and a plurality of pixels arranged on an upper surface of the substrate,

wherein each of the plurality of pixels comprises a light emitting device and a drive device which drives the light emitting device, the drive device comprising;

a first transistor which is provided on the upper surface of the substrate and which comprises a first source electrode, a first drain electrode and a first gate electrode;

a second transistor which is provided on the upper surface of the substrate and which comprises a second source electrode, a second drain electrode and a second gate electrode, wherein the second transistor is of a same conductive type as the first transistor;

a source connecting wiring which electrically connects the first source electrode and the second source electrode;

a drain connecting wiring which electrically connects the first drain electrode and the second drain electrode; and

a gate connecting wiring which electrically connects the first gate electrode and the second gate electrode,

wherein the first source electrode and the first drain electrode are arranged along a first direction and the second source electrode and the second drain electrode are arranged along the first direction in a reverse order of an order of the first source electrode and the first drain electrode along the first direction,

wherein the source connecting wiring and the drain connecting wiring are provided at positions except a region overlapped with the first gate electrode, the second gate electrode and the gate connecting wiring, and

wherein one of the source connecting wiring and the drain connecting wiring includes a region which overlaps planarly with the other of the source connecting wiring and the drain connecting wiring via an insulation film.

18. The electronic device according to claim 17, wherein the first transistor and the second transistor are provided on the substrate so as to be adjacent to each other along a second direction orthogonal to the first direction, and

wherein the first gate electrode, the second gate electrode and the gate connecting wiring are formed as a single conductor layer formed in one layer on the substrate.

19. The electronic device according to claim 17, wherein one of the source connecting wiring and the drain connecting wiring comprises a first connecting wiring and a second connecting wiring whish that is provided in a layer different from a layer in which the first connecting wiring is provided and that is electrically connected to the first connecting wiring, and

wherein the other of the source connecting wiring and the drain connecting wiring comprises a third connecting wiring which is provided, via an insulating film, in a layer different from one of the layer in which the first connecting wiring is provided and the layer in which the second connecting wiring is provided.