Execution monitor for electronic design automation
First Claim
1. A method for monitoring execution of a user-configurable electronic design automation (EDA) flow, comprising:
- providing first signals to display an EDA flow-control environment on a display, wherein the flow-control environment includes an execution-monitoring window;
initiating, based on a first user input, the user-configurable EDA flow, which is displayed as a top-level sequence of blocks, wherein a block in the sequence of blocks comprises a user-configurable collection of sub-block flows, wherein a sub-block in a sub-block flow represents a sequence of EDA tasks that are performed on the circuit design;
receiving, from the user, modifications to one or more blocks or sub-blocks at any level of a hierarchy of blocks and sub-blocks;
monitoring execution of the user-configurable EDA flow tasks, wherein the EDA flow tasks result in a realization of an integrated chip design product idea, and wherein the EDA flow tasks comprise logic design, functional verification, synthesis, top-level routing, and timing analysis; and
displaying, based on a second user input, execution status information and progress in execution of the blocks and the sub-blocks at a desired level of the hierarchy of blocks and associated sub-blocks, wherein the displayed execution status information and progress in execution reflects the received modifications from the user.
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Abstract
Embodiments of a computer system, a method, a graphical user interface and a computer-program product (i.e., software) for use with the computer system are described. A chip designer may use these devices and techniques to configure and monitor the execution of tasks in a user-configurable electronic-design-automation (EDA) flow associated with a circuit or chip design. In particular, using an intuitive and interactive graphical user interface in EDA software, the chip designer can configure and initiate execution of the EDA flow. Then, during execution of EDA tasks in the EDA flow, an execution monitor in the graphical user interface may provide a graphical representation of real-time execution status information for the EDA tasks. Moreover, using the EDA software, the chip designer can debug the circuit or chip design if any errors or problems occur.
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Citations
23 Claims
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1. A method for monitoring execution of a user-configurable electronic design automation (EDA) flow, comprising:
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providing first signals to display an EDA flow-control environment on a display, wherein the flow-control environment includes an execution-monitoring window; initiating, based on a first user input, the user-configurable EDA flow, which is displayed as a top-level sequence of blocks, wherein a block in the sequence of blocks comprises a user-configurable collection of sub-block flows, wherein a sub-block in a sub-block flow represents a sequence of EDA tasks that are performed on the circuit design; receiving, from the user, modifications to one or more blocks or sub-blocks at any level of a hierarchy of blocks and sub-blocks; monitoring execution of the user-configurable EDA flow tasks, wherein the EDA flow tasks result in a realization of an integrated chip design product idea, and wherein the EDA flow tasks comprise logic design, functional verification, synthesis, top-level routing, and timing analysis; and displaying, based on a second user input, execution status information and progress in execution of the blocks and the sub-blocks at a desired level of the hierarchy of blocks and associated sub-blocks, wherein the displayed execution status information and progress in execution reflects the received modifications from the user. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A computer-program product for use in conjunction with a computer system, the computer-program product comprising a non-transitory computer-readable storage medium and a computer-program mechanism embedded therein for configuring the computer system to monitor execution of a user-configurable electronic design automation (EDA) flow, comprising:
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instructions for providing first signals to display an EDA flow-control environment on a display, wherein the flow-control environment includes an execution-monitoring window; instructions for initiating, based on a first user input, the user-configurable EDA flow, which is displayed as a top-level sequence of blocks, wherein a block in the sequence of blocks comprises a user-configurable collection of sub-block flows, wherein a sub-block in a sub-block flow represents a sequence of EDA tasks that are performed on the circuit design; instructions for receiving, from the user, modifications to one or more blocks or sub-blocks at any level of a hierarchy of blocks and sub-blocks; instructions for monitoring execution of the user-configurable EDA flow tasks, wherein the EDA flow tasks result in a realization of an integrated chip design product idea, and wherein the EDA flow tasks comprise logic design, functional verification, synthesis, top-level routing, and timing analysis; and instructions for displaying, based on a second user input, execution status information and progress in execution of the blocks and the sub-blocks at a desired level of the hierarchy of blocks and associated sub-blocks, wherein the displayed execution status information and progress in execution reflects the received modifications from the user. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21)
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22. A computer system, comprising:
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a processor; memory; a program module, wherein the program module is stored in the memory and configured to be executed by the processor to monitor execution of a user-configurable electronic design automation (EDA) flow, the program module including; instructions for providing first signals to display an EDA flow-control environment on a display, wherein the flow-control environment includes an execution-monitoring window; instructions for initiating, based on a first user input, the user-configurable EDA flow, which is displayed as a top-level sequence of blocks, wherein a block in the sequence of blocks comprises a user-configurable collection of sub-block flows, wherein a sub-block in a sub-block flow represents a sequence of EDA tasks that are performed on the circuit design; instructions for receiving, from the user, modifications to one or more blocks or sub-blocks at any level of a hierarchy of blocks and sub-blocks; instructions for monitoring execution of the user-configurable EDA flow tasks, wherein the EDA flow tasks result in a realization of an integrated chip design product idea, and wherein the EDA flow tasks comprise logic design, functional verification, synthesis, top-level routing, and timing analysis; and instructions for displaying, based on a second user input, execution status information and progress in execution of the blocks and the sub-blocks at a desired level of the hierarchy of blocks and associated sub-blocks, wherein the displayed execution status information and progress in execution reflects the received modifications from the use.
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23. A non-transitory computer-readable storage medium storing instructions for a graphical user interface on a computer, the instructions comprising:
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instructions for displaying the graphical user interface in a flow-control environment, wherein the graphical user interface is configured to monitor execution of a user-configurable electronic design automation (EDA) flow comprising a top-level sequence of blocks, wherein the user-configurable EDA flow comprises a user-configurable collection of sub-block flows, wherein a sub-block in a sub-block flow represents a sequence of EDA tasks that result in a realization of an integrated chip design product idea, and wherein the EDA flow tasks comprise logic design, functional verification, synthesis, top-level routing, and timing analysis; and instructions for displaying an execution-monitoring window in the graphical user interface, wherein the execution-monitoring window is configured to display a graphical representation of a sequence of blocks in the user-configurable EDA flow and, based at least in part on monitoring of execution of the user-configurable EDA flow, and to display graphical execution status information and progress during execution of the user-configurable EDA flow, wherein the displayed execution status information and progress in execution reflects modifications received from the user to one or more blocks or sub-blocks at any level of a hierarchy of blocks and sub-blocks.
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Specification