Two-transistor pixel array
First Claim
1. A method for operating an array of pixels, at least some pixels in the array comprising a chemically-sensitive field-effect transistor (chemFET) including a first source/drain terminal and a second source/drain terminal, and a floating gate coupled to a passivation layer, and further comprising a select transistor including a first source/drain terminal, a second source/drain terminal, and a gate terminal, wherein the first source/drain terminal of the second transistor is directly connected to the first source/drain terminal of the chemFET, the method comprising:
- selecting a pixel in the array of pixels, wherein the second source/drain terminal of the chemFET of the selected pixel is directly connected to a first line, and the second source/drain terminal of the select transistor of the selected pixel is directly connected to a second line;
applying a bias voltage to one of the first and second lines;
applying a pass voltage to the gate terminal of the select transistor of the selected pixel during a read interval, thereby inducing current flow between the first line and the second line through the selected pixel to establish an output voltage level on the other of the first and second lines; and
reading the selected pixel based on the output voltage level on the other of the first and second lines.
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Accused Products
Abstract
A two-transistor (2T) pixel comprises a chemically-sensitive transistor (ChemFET) and a selection device which is a non-chemically sensitive transistor. A plurality of the 2T pixels may form an array, having a number of rows and a number of columns. The ChemFET can be configured in a source follower or common source readout mode. Both the ChemFET and the non-chemically sensitive transistor can be NMOS or PMOS device.
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Citations
17 Claims
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1. A method for operating an array of pixels, at least some pixels in the array comprising a chemically-sensitive field-effect transistor (chemFET) including a first source/drain terminal and a second source/drain terminal, and a floating gate coupled to a passivation layer, and further comprising a select transistor including a first source/drain terminal, a second source/drain terminal, and a gate terminal, wherein the first source/drain terminal of the second transistor is directly connected to the first source/drain terminal of the chemFET, the method comprising:
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selecting a pixel in the array of pixels, wherein the second source/drain terminal of the chemFET of the selected pixel is directly connected to a first line, and the second source/drain terminal of the select transistor of the selected pixel is directly connected to a second line; applying a bias voltage to one of the first and second lines; applying a pass voltage to the gate terminal of the select transistor of the selected pixel during a read interval, thereby inducing current flow between the first line and the second line through the selected pixel to establish an output voltage level on the other of the first and second lines; and reading the selected pixel based on the output voltage level on the other of the first and second lines. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for operating an array of pixels arranged in a plurality of rows and a plurality of columns, at least some pixels in the array comprising a chemically-sensitive field-effect transistor (chemFET) including a first source/drain terminal and a second source/drain terminal, and a floating gate coupled to a passivation layer, and further comprising a select transistor including a first source/drain terminal, a second source/drain terminal, and a gate terminal, wherein the first source/drain terminal of the second transistor is directly connected to the first source/drain terminal of the chemFET, the method comprising:
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selecting a pair of adjacent pixels arranged in a given column in the plurality of columns, wherein the second source/drain terminal of the select transistor of a first pixel of the selected pair is directly connected to a first column line, the second source/drain terminal of the select transistor of a second pixel of the selected pair is directly connected to a second column line, and the second source/drain terminals of the chemFETs of the selected pair are directly connected to a third column line; applying a bias voltage to the third column line; applying pass voltages to the gate terminals of the select transistors of the first and second pixels of the selected pair during a read interval, thereby inducing current flow between the first column line and the third column line through the first pixel of the selected pair to establish an output voltage level on the first column line, and inducing current flow between the second column line and the third column line through the second pixel of the selected pair to establish an output voltage level on the second column line; and reading the first pixel of the selected pair based on the output voltage level on the first column line, and reading the second pixel of the selected pair based on the output voltage level on the second column line. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17)
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Specification