Semiconductor device

• US 8,415,667 B2
• Filed: 12/01/2010
• Issued: 04/09/2013
• Est. Priority Date: 12/04/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Kawae, Daisuke, Godo, Hiromichi
• Primary Examiner(s): Pham, Hoai V
• Application Number:
  US12/957,434
• Publication Number:
  US 20110133178A1
• Time in Patent Office: 860 Days
• Field of Search: 257/40, 257/59, 257/72, 257/347, 257/E29.117, 257/E29.273
• US Class Current: 257/59
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/45 Ohmic electrodes
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

One object is to provide a p-channel transistor including an oxide semiconductor. Another object is to provide a complementary metal oxide semiconductor (CMOS) structure of an n-channel transistor including an oxide semiconductor and a p-channel transistor including an oxide semiconductor. A p-channel transistor including an oxide semiconductor includes a gate electrode layer, a gate insulating layer, an oxide semiconductor layer, and a source and drain electrode layers in contact with the oxide semiconductor layer. When the electron affinity and the band gap of an oxide semiconductor used for the oxide semiconductor layer in the semiconductor device, respectively, are χ (eV) and E_g (eV), the work function (φ_m) of the conductor used for the source electrode layer and the drain electrode layer satisfies φ_m>χ+E_g/2 and the barrier for holes (φ_Bp) represented by (χ+E_g−φ_m) is less than 0.25 eV.

Claims

1. A semiconductor device comprising a transistor, the transistor comprising:

an oxide semiconductor layer;

a gate electrode layer adjacent to the oxide semiconductor layer;

a gate insulating layer interposed between the oxide semiconductor layer and the gate electrode layer; and

a source electrode layer in contact with the oxide semiconductor layer and a drain electrode layer in contact with the oxide semiconductor layer,

wherein a work function (φ

_m) of a conductor used for the source electrode layer and the drain electrode layer satisfies φ

_m>

χ

+E_g/2,

wherein a barrier for holes (φ

_Bp) represented by (χ

+E_g−

φ

_m) is less than 0.25 eV, and

wherein an electron affinity of an oxide semiconductor used for the oxide semiconductor layer is represented by χ

(eV) and a band gap of the oxide semiconductor used for the oxide semiconductor layer is represented by E_g (eV).

2. The semiconductor device according to claim 1, wherein the conductor is a metal oxide.

3. A semiconductor device comprising a transistor, the transistor comprising:

an oxide semiconductor layer including at least one of indium, gallium, and zinc;

a gate electrode layer adjacent to the oxide semiconductor layer;

a gate insulating layer interposed between the oxide semiconductor layer and the gate electrode layer; and

a source electrode layer in contact with the oxide semiconductor layer and a drain electrode layer in contact with the oxide semiconductor layer,

wherein a work function (φ

_m) of a conductor used for the source electrode layer and the drain electrode layer satisfies φ

_m>

χ

+E_g/2,

wherein a barrier for holes (φ

_Bp) represented by (χ

+E_g−

φ

_m) is less than 0.25 eV, and

wherein an electron affinity of an oxide semiconductor used for the oxide semiconductor layer is represented by χ

(eV) and a band gap of the oxide semiconductor used for the oxide semiconductor layer is represented by E_g (eV).

4. The semiconductor device according to claim 3, wherein the conductor is a metal oxide.

5. A semiconductor device comprising a p-channel transistor and an n-channel transistor,

the p-channel transistor comprising:

a first oxide semiconductor layer;

a first gate electrode layer adjacent to the first oxide semiconductor layer;

a first gate insulating layer interposed between the first oxide semiconductor layer and the first gate electrode layer; and

a first source electrode layer in contact with the first oxide semiconductor layer and a first drain electrode layer in contact with the first oxide semiconductor layer,

the n-channel transistor comprising;

a second oxide semiconductor layer;

a second gate electrode layer adjacent to the second oxide semiconductor layer;

a second gate insulating layer interposed between the second oxide semiconductor layer and the second gate electrode layer; and

a second source electrode layer in contact with the second oxide semiconductor layer and a second drain electrode layer in contact with the second oxide semiconductor layer,

wherein a work function (φ

_m1) of a first conductor used for the first source electrode layer and the first drain electrode layer satisfies φ

_m1>

χ

₁+E_g1/2,

wherein a barrier for holes (φ

_Bp1) represented by (χ

₁+E_g1−

φ

_m1) is less than 0.25 eV, and

wherein an electron affinity of a first oxide semiconductor used for the first oxide semiconductor layer is represented by χ

₁ (eV) and a band gap of the first oxide semiconductor used for the first oxide semiconductor layer is represented by E_g1 (eV).

6. The semiconductor device according to claim 5,

wherein the first conductor is a metal oxide, and

wherein a second conductor used for the second source electrode layer and the second drain electrode layer is metal.

7. The semiconductor device according to claim 5,

wherein the first oxide semiconductor layer and the second oxide semiconductor layer include at least one of indium, gallium, and zinc.

8. The semiconductor device according to claim 5,

wherein the first oxide semiconductor used for the first oxide semiconductor layer and a second oxide semiconductor used for the second oxide semiconductor layer are formed using a same material.