Semiconductor component and method of manufacture

• US 8,415,739 B2
• Filed: 11/14/2008
• Issued: 04/09/2013
• Est. Priority Date: 11/14/2008
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: Venkatraman, Prasad, Hossain, Zia
• Primary Examiner(s): Whalen, Daniel
• Assistant Examiner(s): CHI, SUBERR L
• Application Number:
  US12/271,106
• Publication Number:
  US 20100123189A1
• Time in Patent Office: 1,607 Days
• Field of Search: 257/334, 257/340, 257/509, 257330-332, 257/510, 257/513, 438/270, 438/272
• US Class Current: 257/330
• CPC Class Codes: H01L 29/0638 for preventing surface leakage due to surface inversion layer, e.g. with channel stopper channel stoppers in combination with isolation region for integrated circuits H01L21/762
• CPC Class Codes: H01L 29/402 Field plates
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: H01L 29/4933 with a silicide layer contacting the silicon layer, e.g. Polycide gate with a barrier layer between the silicide and silicon layers H01L29/4941
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A semiconductor component that includes an edge termination structure and a method of manufacturing the semiconductor component. A semiconductor material has a semiconductor device region and an edge termination region. One or more device trenches may be formed in the semiconductor device region and one or more termination trenches is formed in the edge termination region. A source electrode is formed in a portion of a termination trench adjacent its floor and a floating electrode termination structure is formed in the portion of the termination trench adjacent its mouth. A second termination trench may be formed in the edge termination region and a non-floating electrode may be formed in the second termination trench. Alternatively, the second termination trench may be omitted and a trench-less non-floating electrode may be formed in the edge termination region.

Claims

1. A semiconductor component, comprising:

a semiconductor material of a first conductivity type having first and second major surfaces;

one or more device trenches extending from the first major surface into the semiconductor material, each device trench of the one or more device trenches having first and second sidewalls and a floor;

a first termination trench extending from the first major surface into the semiconductor material, the first termination trench having first and second sidewalls and a floor;

a first layer of dielectric material disposed on the floors and portions of the sidewalls adjacent to the floors of the one or more device trenches and the first termination trench;

a device electrode in each of the one or more device trenches and a first termination electrode on the first layer of dielectric material in the first termination trench;

a second layer of dielectric material disposed on each device electrode and on the first termination electrode;

a device control electrode in each of the one or more device trenches and a floating electrode in the first termination trench, wherein each device control electrode is electrically isolated from each device electrode by the second layer of dielectric material, the floating electrode is electrically isolated from the first termination electrode by the second layer of dielectric material, and wherein the floating electrode is electrically isolated from each device electrode and from each device control electrode;

an impurity material of a second conductivity type in portions of the semiconductor material that are laterally adjacent the first and second sidewalls of the one or more device trenches and the first sidewall of the first termination trench, the impurity material of the second conductivity type absent from the portion of the semiconductor material adjacent the second sidewall of the first termination trench; and

an impurity material of the first conductivity type in portions of the semiconductor material that have the impurity material of the second conductivity type and that are adjacent the first and second sidewalls of the one or more device trenches.

2. The semiconductor component of claim 1, wherein the one or more device trenches comprise first and second device trenches, wherein a lateral distance between first and second device trenches of the one or more device trenches is substantially the same as a lateral distance between the second device trench of the at least one device trench and the first termination trench.

3. The semiconductor component of claim 1, wherein the first termination electrode is coupled to at least one of the device electrodes in each of the one or more device trenches.

4. The semiconductor component of claim 1, further including:

a second termination trench extending from the first major surface into the semiconductor material, the second termination trench having a floor and sidewalls;

a portion of the first layer of dielectric material disposed on the floor and the sidewalls of the second termination trench; and

a second termination electrode on the first layer of dielectric material in the second termination trench.

5. The semiconductor component of claim 4, wherein the second termination electrode is electrically coupled to the device electrode.

6. A semiconductor component, comprising:

a semiconductor material of a first conductivity type having a device region, a termination region, and first and second major surfaces;

a field effect transistor formed in the device region, the field effect transistor comprising;

a device trench extending from the first major surface into the semiconductor material, the device trench having first and second sidewalls;

first and second doped regions of a second conductivity type in portions of the semiconductor material adjacent the first and second sidewalls of the device trench; and

third and fourth doped regions of the first conductivity type in the first and second doped regions, respectively, and adjacent the first and second sidewalls; and

a first termination structure formed in the termination region, the first termination structure comprising;

a first termination trench extending from the first major surface into the semiconductor material and having a floor and first and second sidewalls, the first termination trench having first and second portions, wherein the second doped region of the second conductivity type is adjacent the first sidewall of the first termination trench, the fourth doped region of the first conductivity type is not adjacent the first and second sidewalls of the first termination trench;

a first layer of dielectric material on the floor and the first and second sidewalls in the first portion of the first termination trench and on the floor and the first and second sidewalls of the device trench;

a first termination electrode on the first layer of dielectric material in the first termination trench;

a device electrode on the first layer of dielectric material in the device trench;

a second layer of dielectric material on the first termination electrode and on the sidewalls in the second portion of the first termination trench and on the device electrode;

a device control electrode on the second layer of dielectric material in the device trench; and

a floating electrode on the second layer of dielectric material in the termination trench, wherein the floating electrode is electrically isolated from the first termination electrode, the control electrode, and from the third and fourth doped regions of the first conductivity type in the first and second doped regions.

7. The semiconductor component of claim 6, wherein the field effect transistor further comprises:

one or more additional device trenches extending from the first major surface into the semiconductor material, wherein each additional device trench of the one or more additional device trenches has first and second portions;

the first layer of dielectric material on the floor and the sidewalls in the first portion of each additional device trench of the one or more additional device trenches;

a source electrode on the first layer of dielectric material;

the second layer of dielectric material on the source electrode;

a gate dielectric material on the sidewalls in the second portion of each additional device trench of the one or more additional device trenches; and

a gate electrode on the gate dielectric material in each additional device trench of the one or more additional device trenches.

8. The semiconductor component of claim 6, wherein the first termination electrode on the first layer of dielectric material is electrically coupled to the semiconductor material.

9. The semiconductor component of claim 6, further including:

a second termination structure formed in the termination region, the second termination structure comprising;

a second termination trench extending from the first major surface into the semiconductor material;

the first layer of dielectric material on the floor and the sidewalls of the second termination trench; and

a third termination electrode on the first layer of dielectric material.

10. The semiconductor component of claim 9, wherein the third termination electrode on the first layer of dielectric material is electrically coupled to the semiconductor material.