Semiconductor device and method of manufacturing the same

• US 8,415,753 B2
• Filed: 04/28/2010
• Issued: 04/09/2013
• Est. Priority Date: 04/28/2009
• Status: Active Grant

• Current Assignee: Canon Anelva Corporation (Canon Inc.)
• Original Assignee: Canon Anelva Corporation (Canon Inc.)
• Inventors: Kitano, Naomu, Matsuo, Kazuaki, Kosuda, Motomu, Tatsumi, Toru, Nakagawa, Takashi
• Primary Examiner(s): Reames, Matthew
• Assistant Examiner(s): BODNAR, JOHN A
• Application Number:
  US13/264,955
• Publication Number:
  US 20120043617A1
• Time in Patent Office: 1,077 Days
• Field of Search: 257/412, 257/369, 257/E29.16, 257/368, 257/E21.409, 438/198, 438/216, 438/605, 438/653
• US Class Current: 257/412
• CPC Class Codes: H01L 21/28088 the final conductor layer next to the insulator being a composite, e.g. TiN
• CPC Class Codes: H01L 21/823842 gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
• CPC Class Codes: H01L 21/823857 with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618

Abstract

This invention provides a semiconductor device having a field effect transistor comprising a gate electrode comprising a metal nitride layer and a polycrystalline silicon layer, and the gate electrode is excellent in thermal stability and realizes a desired work function. In the semiconductor device, a gate insulating film 6 on a silicon substrate 5 has a high-permittivity insulating film formed of a metal oxide, a metal silicate, a metal oxide introduced with nitrogen, or a metal silicate introduced with nitrogen, the gate electrode has a first metal nitride layer 7 provided on the gate insulating film 6 and containing Ti and N, a second metal nitride layer 8 containing Ti and N, and a polycrystalline silicon layer 9, in the first metal nitride layer 7, a molar ratio between Ti and N (N/Ti) is not less than 1.1, and a crystalline orientation X1 is 1.1<X1 <1.8, and in the second metal nitride layer 8, the molar ratio between Ti and N (N/Ti) is not less than 1.1, and a crystalline orientation X2 is 1.8≦X2.

Claims

1. A semiconductor device, which comprises a field effect

transistor provided on a silicon substrate and having a gate insulating film and a first gate electrode provided on the gate insulating film,

wherein the gate insulating film has a high-permittivity insulating film formed of a metal oxide, a metal silicate, a metal oxide introduced with nitrogen, or a metal silicate introduced with nitrogen,

the first gate electrode has a first metal nitride layer provided on the gate insulating film and containing Ti and N, a second metal nitride layer provided on the first metal nitride layer and containing Ti and N, and a first polycrystalline silicon layer provided on the second metal nitride layer,

in the first metal nitride layer, a molar ratio of N to Ti (N/Ti) is not less than 1.1, and a first crystalline orientation X1 is 1.1<

X1<

1.8, where X1 is a first ratio of C200 to C111, and C200 and C111 are the peak intensity measurements of the respective 200 and 111 crystal orientations from the x-ray diffraction of the first metal nitride layer, and in the second metal nitride layer, the molar ratio of N to Ti (N/Ti) is not less than 1.1, and a second crystalline orientation X2 is 1.8≦

X2, where X2 is a second ratio of C200 to C111, and C200 and C111 are the peak intensity measurements of the respective 200 and 111 crystal orientations from the x-ray diffraction of the second metal nitride layer.

2. The semiconductor device according to claim 1, wherein the field effect transistor is a P-type MOSFET.

3. The semiconductor device according to claim 2, further comprising an N-type MOSFET provided on the silicon substrate, wherein the N-type MOSFET has the gate insulating film and a second gate electrode provided on the gate insulating film, the gate insulating film has a high-permittivity insulating film formed of a metal oxide, a metal silicate, a metal oxide introduced with nitrogen, or a metal silicate introduced with nitrogen, the gate electrode has a third metal nitride layer provided on the gate insulating film and containing Ti and N and a second polycrystalline silicon layer provided on the third metal nitride layer, and in the third metal nitride layer, the molar ratio of N to Ti (N/Ti) is not more than 1.1, and a third crystalline orientation X3 is not more than 1.1, where X3 is the third ratio of C200 to C111, and C200 and C111 are the peak intensity measurements of the respective 200 and 111 crystal orientations from the x-ray diffraction of the third metal nitride layer.

4. The semiconductor device according to claim 1 wherein each molar ratio of N to Ti of the first metal nitride layer and the second metal nitride layers is not less than 1.2.

5. The semiconductor device according to claim 1, wherein each film density of the first metal nitride layer and the second metal nitride layer is not less than 4.8 g/cc.

6. The semiconductor device according to claim 1, wherein the sum of the film thickness of the first metal nitride layer and the film thickness of the second metal nitride layer is not more than 20 nm.

7. The semiconductor device according to claim 1, wherein the high-permittivity insulating film has an insulating film containing Hf or Zr.

8. The semiconductor device according to claim 1, wherein the gate insulating film has a stacked structure comprising a silicon oxide film or a silicon oxynitride film and a layer containing Hf or Zr.

9. A method of manufacturing a semiconductor device, which comprises a field effect transistor provided on a silicon substrate and having a gate insulating film which has a high-permittivity insulating film formed of a metal oxide, a metal silicate, a metal oxide introduced with nitrogen, or a metal silicate introduced with nitrogen and a gate electrode which has a first metal nitride layer provided on the gate insulating film and containing Ti and N, a second metal nitride layer provided on the first metal nitride layer and containing Ti and N, and a polycrystalline silicon layer provided on the second metal nitride layer, the method comprising the steps of:

forming the first metal nitride layer in which a molar ratio between Ti and N (N/Ti) is not less than 1.1, and a crystalline orientation X1 is within a range of 1.1<

X1 <

1.8, where X1 is a first ratio of C200 to C111, and C200 and C111 are the peak intensity measurements of the respective 200 and 111 crystal orientations from the x-ray diffraction of the first metal nitride layer; and

forming the second metal nitride layer in which the molar ratio of N to Ti (N/Ti)is not less than 1.1, and a crystalline orientation X2 is 1.8 X2, where X2 is a second ratio of C200 to C111, and C200 and C111 are the peak intensity measurements of the respective 200 and 111 crystal orientations from the x-ray diffraction of the second metal nitride layer.

10. The method of manufacturing a semiconductor device, according to claim 9, wherein the step of forming the first metal nitride layer and the step of forming the second metal nitride layer are a step of magnetron-sputtering a Ti target under a mixed atmosphere of a reactive gas composed of nitrogen and an inert gas, in the step of forming the first metal nitride layer, the blend ratio between the reactive gas and the inert gas is set so that the molar ratio of N to Ti (N/Ti) in the first metal nitride layer is not less than 1.1, and the crystalline orientation X1 satisfies the range of 1.1<

X1<

1.8,

in the step of forming the second metal nitride layer, the blend ratio between the reactive gas and the inert gas is set so that the molar ratio of N to Ti (N/Ti) in the second metal nitride layer is not less than 1.1, and the crystalline orientation X2 satisfies 1.8≦

X2.

11. The method of manufacturing a semiconductor device, according to claim 10, wherein the step of forming the first metal nitride layer and the step of forming the second metal nitride layer are performed in the same film-formation treatment chamber.

12. A computer readable recording medium having a program for manufacturing a semiconductor device, which comprises a field effect transistor provided on a silicon substrate and having a gate insulating film which has a high-permittivity insulating film formed of a metal oxide, a metal silicate, a metal oxide introduced with nitrogen, or a metal silicate introduced with nitrogen and a gate electrode which has a first metal nitride layer provided on the gate insulating film and containing Ti and N, a second metal nitride layer provided on the first metal nitride layer and containing Ti and N, and a polycrystalline silicon layer provided on the second metal nitride layer, wherein the program causing a computer to execute:

a procedure for forming the first metal nitride layer in which the molar ratio of N to Ti (N/Ti) is not less than 1.1, and a crystalline orientation X1 is within a range of 1.1<

Xl<

1.8 where X1 is a first ratio of C200 to C111, and C200 and C111 are the peak intensity measurements of the respective 200 and 111 crystal orientations from the x-ray diffraction of the first metal nitride layer;

and a procedure for forming the second metal nitride layer in which the molar ratio of N to Ti (N/Ti) is not less 1.1, and a crystalline orientation X2 is 1.8≦

X2, where X2 is a second ratio of C200 to C111, and C200 and C111 are the peak intensity measurements of the respective 200 and 111 crystal orientations from the x-ray diffraction of the second metal nitride layer.

13. The computer readable recording medium, according to claim 12, wherein in the procedure for forming the first metal nitride layer, when a Ti target is magnetron-sputtered under a mixed atmosphere of a reactive gas composed of nitrogen and an inert gas, a blend ratio between the reactive gas and the inert gas is controlled so that the molar ratio of N to Ti (N/Ti) in the first metal nitride layer is not less than 1.1, and the crystalline orientation X1 satisfies the range of 1.1 <

Xl <

1.8, and in the procedure for forming the second metal nitride layer, when the Ti target is magnetron-sputtered under the mixed atmosphere of the reactive gas composed of nitrogen and the inert gas, the blend ratio between the reactive gas and the inert gas is controlled so that the molar ratio of N to Ti (N/Ti) in the second metal nitride layer is not less than 1.1, and the crystalline orientation X2 satisfies 1.8 X2.