Analog to digital converter with dual integrating capacitor systems

• US 8,416,117 B2
• Filed: 08/11/2011
• Issued: 04/09/2013
• Est. Priority Date: 08/11/2011
• Status: Active Grant

• Current Assignee: Atmel Corporation (Microchip Technology Incorporated)
• Original Assignee: Atmel Corporation (Microchip Technology Incorporated)
• Inventors: Pedersen, Trond
• Primary Examiner(s): Nguyen, Khai M
• Application Number:
  US13/208,254
• Publication Number:
  US 20130038476A1
• Time in Patent Office: 607 Days
• Field of Search: 341/33, 341/34, 341/155, 341/172, 345/173
• US Class Current: 341/172
• CPC Class Codes: H03M 1/1215 using time-division multiplexing
• CPC Class Codes: H03M 1/162 the steps being performed sequentially in a single stage, i.e. recirculation type H03M1/161 takes precedence
• CPC Class Codes: H03M 1/46 with digital/analogue converter for supplying reference values to converter

Abstract

In one embodiment, an apparatus comprises a first capacitor system and a second capacitor system. Each capacitor system is removably coupled to the same portion of an analog to digital converter (ADC) and the same sensing circuit. Each capacitor system stores charge received through the sensing circuit when coupled to the sensing circuit and provides the charge received through the sensing circuit to the ADC for conversion into a digital value when coupled to the ADC. When the control signals are in a first state, the first capacitor system receives charge through the sensing circuit and the second capacitor system is coupled to the portion of the ADC. When the one or more control signals are in a second state, the second capacitor system is coupled to the sensing circuit to receive charge through the sensing circuit and the first capacitor system is coupled to the portion of the ADC.

Claims

1. An apparatus comprising:

a first capacitor system and a second capacitor system, each capacitor system comprising one or more capacitors, each capacitor system removably coupled to the same portion of an analog to digital converter (ADC) and the same sensing circuit, each capacitor system configured to store an amount of charge received through the sensing circuit when coupled to the sensing circuit, and provide the amount of charge received through the sensing circuit to the ADC for conversion into a digital value when coupled to the portion of the ADC;

a timing circuit configured to generate one or more control signals; and

a switching circuit configured to;

receive the one or more control signals;

when the one or more control signals are in a first state, couple the first capacitor system to the sensing circuit to receive charge through the sensing circuit and concurrently couple the second capacitor system to the portion of the ADC; and

when the one or more control signals are in a second state, couple the second capacitor system to the sensing circuit to receive charge through the sensing circuit and concurrently couple the first capacitor system to the portion of the ADC.

2. The apparatus of claim 1, wherein:

the sensing circuit is coupled to a capacitive touch sensor; and

the amount of charge is indicative of a measured capacitance of an area of the capacitive touch sensor.

3. The apparatus of claim 1, the switching circuit comprising:

a first switch system comprising one or more switches operable to couple the first capacitor system to the sensing circuit;

a second switch system comprising one or more switches operable to couple the first capacitor system to the portion of the ADC;

a third switch system comprising one or more switches operable to couple the second capacitor system to the sensing circuit; and

a fourth switch system comprising one or more switches operable to couple the second capacitor system to the portion of the ADC.

4. The apparatus of claim 3, wherein the switching circuit is configured to:

hold each switch of the first switch system and the fourth switch system closed while concurrently holding each switch of the second switch system and the third switch system open; and

hold each switch of the second switch system and the third switch system closed while concurrently holding each switch of the first switch system and the fourth switch system open.

5. The apparatus of claim 3, wherein:

each switch of the second switch system and the fourth switch system is directly connected to a differential amplifier of the ADC.

6. The apparatus of claim 1, wherein:

the first capacitor system and the second capacitor system are each operable to store an intermediate result from a differential amplifier of the ADC.

7. The apparatus of claim 1, the ADC comprising:

a digital to analog converter (DAC) that is removably coupled to the first capacitor system and the second capacitor system, the DAC configured to be coupled to;

the first capacitor system for at least a portion of a first time period in which the ADC converts charge stored by the first capacitor system to the first digital value; and

the second capacitor system for at least a portion of a second time period in which the ADC converts charge stored by the second capacitor system to the second digital value.

8. A method comprising:

generating one or more control signals;

when the one or more control signals are in a first state;

coupling a first capacitor system comprising one or more capacitors to a sensing circuit;

coupling a second capacitor system comprising one or more capacitors to a portion of an analog to digital converter (ADC);

storing, by the first capacitor system, a first amount of charge received through the sensing circuit;

providing, by the second capacitor system, a second amount of charge to the ADC for conversion into a first digital value; and

when the one or more control signals are in a second state;

coupling the second capacitor system to the sensing circuit;

coupling the first capacitor system to the portion of the ADC;

storing, by the second capacitor system, a third amount of charge received through the sensing circuit; and

providing, by the first capacitor system, the first amount of charge to the ADC for conversion into a second digital value.

9. The method of claim 8, wherein:

the sensing circuit is coupled to a capacitive touch sensor; and

the first, second, and third amounts of charge are each indicative of a capacitance of an area of the capacitive touch sensor.

10. The method of claim 8, wherein:

the first capacitor system is coupled to the sensing circuit by a first switch system comprising one or more switches;

the first capacitor system is coupled to the portion of the ADC by a second switch system comprising one or more switches;

the second capacitor system is coupled to the sensing circuit by a third switch system comprising one or more switches; and

the second capacitor system is coupled to the portion of the ADC by a fourth switch system comprising one or more switches.

11. The method of claim 10, further comprising:

holding each switch of the first switch system and the fourth switch system closed while concurrently holding each switch of the second switch system and the third switch system open; and

holding each switch of the second switch system and the third switch system closed while concurrently holding each switch of the first switch system and the fourth switch system open.

12. The method of claim 10, wherein:

each switch of the second switch system and the fourth switch system is directly connected to a differential amplifier of the ADC.

13. The method of claim 8, further comprising:

storing a first intermediate result from a differential amplifier of the ADC in the first capacitor system; and

storing a second intermediate result from a differential amplifier of the ADC in the second capacitor system.

14. The method of claim 8, further comprising:

coupling a digital to analog converter (DAC) to the first capacitor system for at least a portion of a first time period in which the ADC converts the first amount of charge stored by the first capacitor system to the second digital value; and

coupling the DAC to the second capacitor system for at least a portion of a second time period in which the ADC converts the second amount of charge stored by the second capacitor system to the first digital value.

15. An apparatus, comprising:

a capacitive touch sensor comprising a plurality of nodes; and

a control unit coupled to the capacitive touch sensor, the control unit comprising;

a first capacitor system and a second capacitor system, each capacitor system comprising one or more capacitors, each capacitor system removably coupled to the same portion of an analog to digital converter (ADC) and at least one node of the capacitive touch sensor, each capacitor system configured to store an amount of charge received through the at least one node when coupled to the at least one node, and provide the amount of charge received through the at least one node to the ADC for conversion into a digital value when coupled to the ADC;

a timing circuit configured to generate one or more control signals; and

a switching circuit configured to;

receive the one or more control signals;

when the one or more control signals are in a first state, couple the first capacitor system to the at least one node to receive charge through the at least one node and concurrently couple the second capacitor system to the portion of the ADC; and

when the one or more control signals are in a second state, couple the second capacitor system to the at least one node to receive charge through the at least one node and concurrently couple the first capacitor system to the portion of the ADC.

16. The apparatus of claim 15, wherein:

the amount of charge is indicative of a capacitance of the at least one node of the capacitive touch sensor.

17. The apparatus of claim 15, the switching circuit comprising:

a first switch system comprising one or more switches operable to couple the first capacitor system to the at least one node;

a second switch system comprising one or more switches operable to couple the first capacitor system to the portion of the ADC;

a third switch system comprising one or more switches operable to couple the second capacitor system to the at least one node; and

a fourth switch system comprising one or more switches operable to couple the second capacitor system to the portion of the ADC.

18. The apparatus of claim 17, wherein the switching circuit is configured to:

hold each switch of the first switch system and the fourth switch system closed while concurrently holding each switch of the second switch system and the third switch system open; and

hold each switch of the second switch system and the third switch system closed while concurrently holding each switch of the first switch system and the fourth switch system open.

19. The apparatus of claim 17, wherein:

each switch of the second switch system and the fourth switch system is directly connected to a differential amplifier of the ADC.

20. The apparatus of claim 15, wherein:

the first capacitor system and the second capacitor system are each operable to store an intermediate result from a differential amplifier of the ADC.

21. The apparatus of claim 15, further comprising:

a digital to analog converter (DAC) that is removably coupled to the first capacitor system and the second capacitor system, the DAC configured to be coupled to;

the first capacitor system for at least a portion of a first time period in which the ADC converts charge stored by the first capacitor system to the first digital value; and

the second capacitor system for at least a portion of a second time period in which the ADC converts charge stored by the second capacitor system to the second digital value.