Driving method of a semiconductor device with an inverted period having a negative potential applied to a gate of an oxide semiconductor transistor

• US 8,416,622 B2
• Filed: 05/16/2011
• Issued: 04/09/2013
• Est. Priority Date: 05/20/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kamata, Koichiro
• Primary Examiner(s): Tran, Andrew Q
• Application Number:
  US13/108,252
• Publication Number:
  US 20110286290A1
• Time in Patent Office: 694 Days
• Field of Search: 365/185.03, 365/185.08, 365/185.05, 365/185.19, 365/185.18
• US Class Current: 365/185.18
• CPC Class Codes: G11C 11/404 with one charge-transfer gate, e.g. MOS transistor, per cell
• CPC Class Codes: G11C 11/4076 Timing circuits for regeneration management G11C11/406
• CPC Class Codes: G11C 16/02 electrically programmable

Abstract

A period (inverted period) in which a high negative potential is applied to a gate of the transistor is provided between a writing period and a retention period. In the inverted period, supply of positive electric charge from the drain of the transistor to the oxide semiconductor layer is promoted. Thus, accumulation of positive electric charge in the oxide semiconductor layer or at the interface between the oxide semiconductor layer and a gate insulating film can converge in a short time. Therefore, it is possible to suppress a decrease in the positive electric charge in the node electrically connected to the drain of the transistor in the retention period after the inverted period. That is, the temporal change of data stored in the semiconductor device can be suppressed.

Claims

1. A driving method of a semiconductor device comprising the steps of:

in a writing period, applying a first potential to a gate of a first transistor, turning on the first transistor, and accumulating a positive electric charge in a node through the first transistor, wherein the node electrically is connected to one of a source and a drain of the first transistor;

in an inverted period following the writing period, applying a second potential to the gate of the first transistor, and turning off the first transistor, wherein the second potential is a negative potential; and

in a retention period following the inverted period, applying a third potential to the gate of the first transistor, maintaining an off state of the first transistor, and retaining positive electric charge accumulated in the node, wherein the third potential is lower than the first potential and higher than the second potential,

wherein a channel region of the first transistor is comprised in an oxide semiconductor layer.

2. The driving method of a semiconductor device, according to claim 1, wherein a part of the positive electric charge accumulated in the node in the writing period is trapped in the oxide semiconductor layer or at an interface between the oxide semiconductor layer and a gate insulating film by applying the second potential to the gate of the first transistor in the inverted period.

3. The driving method of a semiconductor device, according to claim 1, wherein multilevel data is determined in accordance with an amount of the positive electric charge retained in the node.

4. The driving method of a semiconductor device, according to claim 1, wherein the node is connected to a gate of a second transistor.

5. A driving method of a semiconductor device comprising the steps of:

in a first period, applying a first potential to a first electrode of a first transistor comprising oxide semiconductor layer, turning on the first transistor, and accumulating a positive electric charge in a region through the first transistor, wherein the region is connected to a second electrode of the first transistor;

in a second period following the first period, applying a second potential to the first electrode, and turning off the first transistor, wherein the second potential is a negative potential; and

in a third period following the second period, applying a third potential to the first electrode, maintaining an off state of the first transistor, and retaining positive electric charge accumulated in the region, wherein the third potential is lower than the first potential and higher than the second potential,

wherein the oxide semiconductor layer is adjacent to the first electrode with an insulating film interposed therebetween.

6. The driving method of a semiconductor device, according to claim 5, wherein a part of the positive electric charge accumulated in the region in the first period is trapped in the oxide semiconductor layer or at an interface between the oxide semiconductor layer and the insulating film by applying the second potential to the first electrode of the first transistor in the second period.

7. The driving method of a semiconductor device, according to claim 5, wherein multilevel data is determined in accordance with an amount of the positive electric charge retained in the region.

8. The driving method of a semiconductor device, according to claim 5, wherein the region is connected to a gate of a second transistor.