×

On-chip comparison and response collection tools and techniques

  • US 8,418,007 B2
  • Filed: 03/21/2011
  • Issued: 04/09/2013
  • Est. Priority Date: 02/17/2006
  • Status: Active Grant
First Claim
Patent Images

1. An apparatus, comprising:

  • a plurality of scan chain groups, each scan chain group comprising one or more scan chains and one or more corresponding scan chain group outputs;

    a plurality of comparator circuits, each comparator circuit comprising a comparator input and a comparator output;

    a multiple-input shift register (MISR) comprising MISR inputs and a MISR output; and

    a plurality of compactors, each compactor comprising one or more compactor inputs coupled to the one or more scan chain group outputs of a respective one of the plurality of scan chain groups and further comprising a compactor output coupled directly to a respective one of the MISR inputs and also coupled to the comparator input of a respective comparator.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×