Device enabling the use of a programmable component in a natural radiative environment

• US 8,418,027 B2
• Filed: 03/12/2009
• Issued: 04/09/2013
• Est. Priority Date: 03/14/2008
• Status: Active Grant

• Current Assignee: Airbus Operations (European Aeronautic Defence and Space Company EADS NV)
• Original Assignee: Airbus Operations (European Aeronautic Defence and Space Company EADS NV)
• Inventors: Grimonpont, Bruno, Hazo, Samuel
• Primary Examiner(s): ABRAHAM, ESAW T
• Application Number:
  US12/922,528
• Publication Number:
  US 20110022903A1
• Time in Patent Office: 1,489 Days
• Field of Search: 714/758, 714/799, 714/42
• US Class Current: 714/758
• CPC Class Codes: G06F 11/1004 to protect a block of data words, e.g. CRC or checksum G06F11/1076 takes precedence; security arrangements for protecting computers or computer systems against unauthorized activity G06F21/00

Abstract

A device for using a programmable component carrying out at least one logical function in a radiative environment includes: a mechanism for error detection in a data-storing working memory space actually serving to carry out each logical function of the device through use of data stored in at least one reference memory space storing a data copy implemented by at least one logical function; a mechanism blocking at least one output of at least one logical function of the component for which an error in the data implemented by the logical function is detected by the mechanism for detection; and a mechanism correcting each error detected in the working space.

Claims

1. A device allowing use of a programmable component performing at least one logic function in a radiative environment comprising:

a processor;

an error detection unit configured to detect an error in a working memory space storing data used for performance of each logic function of the device, by use of data stored in at least one reference memory space storing a copy of data used by at least one of the logic functions;

a blocking unit configured to block at least one output of at least one logic function of the component for which an error in the data used by the logic function is detected by the error detection unit; and

a correction unit configured to correct each error detected in the working space.

2. A device according to claim 1, wherein the blocking unit includes a storage unit, in a buffer memory, of data generated by the component and/or by components interfaced between the component and the buffer memory.

3. A device according to claim 2, wherein the storage unit has a latency greater than or equal to a maximal time for detection of an error by the error detection unit.

4. A device according to claim 2, wherein during time between detection of an error and correction of the error, a signal is outputted that inhibits reading of the buffer memory.

5. A device according to claim 1, further comprises a detection continuity unit configured to detect continuity of an error and a disabling unit configured to disable a memory zone of the component adapted for preventing use of a memory zone including the continuous error, in event of such detection of continuity of an error.

6. A device according to claim 5, wherein the detection continuity unit includes a diagnosis unit configured to count the errors detected by the error detection unit.

7. A device according to claim 1, further comprising a detection continuity unit configured to detect continuing of an error and a disabling unit configured to disable the error detection unit, in event of such detection of continuity of an error.

8. A device according to claim 1, wherein the programmable component has no access to the reference memory spaces.

9. A device according to claim 1, further comprising a permutation unit configured to permute the working memory space and a reference memory space following a complete cycle of reading the data to be protected without detection of error.

10. A device according to claim 1, further comprising a permutation unit configured to permute the working memory space and a reference memory space following detection of an error in the working memory space.

11. A device according to claim 1, wherein the programmable component is a RAM-based Field-Programmable Gate Array.

12. A device according to claim 1, wherein after detection of the error in the working memory space, the reference memory space is changed into the working memory space.

13. A method allowing use of a programmable component device performing at least one logic function in a radiative environment, the method comprising:

detecting an error in a working memory space storing data used for performance of each logic function of the programmable component device, by use of data stored in at least one reference memory space storing a copy of data used by at least one of the logic functions;

blocking at least one output of at least each logic function of the component for which an error in the data used by the logic function is detected during the detecting; and

correction of each error detected in the working space.

14. A method according to claim 13, wherein, during the blocking, there are stored, in a buffer memory, data generated by the component and/or by components interfaced between the component and the buffer memory.

15. A method according to claim 13, further comprising detecting continuity of an error and, for at least one portion of the detections of continuity of an error, disabling a memory zone of the component preventing the use of a memory zone including the continuous error.

16. A method according to claim 13, further comprising detecting continuity of an error and, for at least a portion of the detections of a continuity of an error, disabling the error detection means, according to a number of detected errors.

17. A method according to claim 13, further comprising permuting the working memory space and a reference memory space following a complete cycle of reading the data to be protected without detection of error.

18. A method according to claim 13, further comprising permuting the working memory space and a reference memory space following detection of an error in the working memory space.