Semiconductor device with two oxide semiconductor layers and manufacturing method thereof
First Claim
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1. A semiconductor device comprising:
- a gate electrode layer provided over an insulating surface;
a gate insulating layer provided over the gate electrode layer;
a first oxide semiconductor layer provided over the gate insulating layer;
a second oxide semiconductor layer provided over and in contact with the first oxide semiconductor layer;
an oxide insulating layer provided over the second oxide semiconductor layer;
a source electrode layer and a drain electrode layer which are provided over the oxide insulating layer, and are in contact with the second oxide semiconductor layer;
a planarizing insulating layer provided over the source electrode layer and the drain electrode layer; and
a conductive layer provided over the planarizing insulating layer and connected with the gate electrode layer,wherein the oxide insulating layer includes a first region and a second region,wherein the first region is in contact with the second oxide semiconductor layer so as to overlap with the gate electrode layer, andwherein the second region is in contact with the second oxide semiconductor layer so as to cover end portions of the second oxide semiconductor layer.
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Abstract
In a bottom-gate thin film transistor using the stack of the first oxide semiconductor layer and the second oxide semiconductor layer, an oxide insulating layer serving as a channel protective layer is formed over and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer. In the same step as formation of the insulating layer, an oxide insulating layer covering a peripheral portion (including a side surface) of the stack of the oxide semiconductor layers is formed.
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Citations
20 Claims
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1. A semiconductor device comprising:
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a gate electrode layer provided over an insulating surface; a gate insulating layer provided over the gate electrode layer; a first oxide semiconductor layer provided over the gate insulating layer; a second oxide semiconductor layer provided over and in contact with the first oxide semiconductor layer; an oxide insulating layer provided over the second oxide semiconductor layer; a source electrode layer and a drain electrode layer which are provided over the oxide insulating layer, and are in contact with the second oxide semiconductor layer; a planarizing insulating layer provided over the source electrode layer and the drain electrode layer; and a conductive layer provided over the planarizing insulating layer and connected with the gate electrode layer, wherein the oxide insulating layer includes a first region and a second region, wherein the first region is in contact with the second oxide semiconductor layer so as to overlap with the gate electrode layer, and wherein the second region is in contact with the second oxide semiconductor layer so as to cover end portions of the second oxide semiconductor layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A semiconductor device comprising:
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a gate electrode layer provided over an insulating surface; a gate insulating layer provided over the gate electrode layer; a first oxide semiconductor layer provided over the gate insulating layer; a second oxide semiconductor layer provided over and in contact with the first oxide semiconductor layer; an oxide insulating layer provided over the second oxide semiconductor layer; a source electrode layer and a drain electrode layer which are provided over the oxide insulating layer, and are in contact with the second oxide semiconductor layer; and a protective insulating layer provided over and in contact with the source electrode layer and the drain electrode layer, wherein the oxide insulating layer includes a first region and a second region, wherein the first region is in contact with the second oxide semiconductor layer so as to overlap with the gate electrode layer, and wherein the second region is in contact with the second oxide semiconductor layer so as to cover end portions of the second oxide semiconductor layer. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16, 17, 18)
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19. A method for manufacturing a semiconductor device, comprising:
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forming a gate electrode layer over an insulating surface; forming a gate insulating layer over the gate electrode layer; forming a first oxide semiconductor layer over the gate insulating layer; forming a second oxide semiconductor layer over and in contact with the first oxide semiconductor layer; forming an oxide insulating layer over the second oxide semiconductor layer; and in contact with over the second oxide semiconductor layer; and forming a source electrode layer and a drain electrode layer which are provided over the oxide insulating layer, and are in contact with the second oxide semiconductor layer, wherein the oxide insulating layer includes a first region and a second region, wherein the first region is in contact with the second oxide semiconductor layer so as to overlap with the gate electrode layer, and wherein the second region is in contact with the second oxide semiconductor layer so as to cover end portions of the second oxide semiconductor layer.
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20. A method for manufacturing a semiconductor device, comprising:
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forming a gate electrode layer over an insulating surface; forming a gate insulating layer over the gate electrode layer; forming a first oxide semiconductor layer over the gate insulating layer; forming a second oxide semiconductor layer over and in contact with the first oxide semiconductor layer; forming an oxide insulating layer provided over the second oxide semiconductor layer; forming a source electrode layer and a drain electrode layer which are provided over the oxide insulating layer, and are in contact with the second oxide semiconductor layer; and forming a protective insulating layer over the source electrode layer and the drain electrode layer, wherein the oxide insulating layer includes a first region and a second region, wherein the first region is in contact with the second oxide semiconductor layer so as to overlap with the gate electrode layer, and wherein the second region is in contact with the second oxide semiconductor layer so as to cover end portions of the second oxide semiconductor layer.
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Specification