Chip package having a chip combined with a substrate via a copper pillar

• US 8,421,222 B2
• Filed: 08/10/2011
• Issued: 04/16/2013
• Est. Priority Date: 10/25/2002
• Status: Expired due to Term

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Megica Corporation (Chipbond Technology Corporation)
• Inventors: Lin, Mou-Shiung, Lin, I, Shih-Hsiung
• Primary Examiner(s): Chambliss, Alonzo
• Application Number:
  US13/207,350
• Publication Number:
  US 20110291275A1
• Time in Patent Office: 615 Days
• Field of Search: None
• US Class Current: 257/724
• CPC Class Codes: H01L 2224/023 Redistribution layers [RDL] for bonding areas
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05572 the external layer extending out of an opening
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/11462 Electroplating
• CPC Class Codes: H01L 2224/1147 using a lift-off mask
• CPC Class Codes: H01L 2224/11822 by dipping, e.g. in a solder bath
• CPC Class Codes: H01L 2224/1308 being stacked
• CPC Class Codes: H01L 2224/13082 Two-layer arrangements
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/13109 Indium [In] as principal constituent
• CPC Class Codes: H01L 2224/13111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/13113 Bismuth [Bi] as principal constituent
• CPC Class Codes: H01L 2224/13116 Lead [Pb] as principal constituent
• CPC Class Codes: H01L 2224/13118 Zinc [Zn] as principal constituent
• CPC Class Codes: H01L 2224/1312 Antimony [Sb] as principal constituent
• CPC Class Codes: H01L 2224/13123 Magnesium [Mg] as principal constituent
• CPC Class Codes: H01L 2224/13139 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/13144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/13147 : Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/1357 : Single coating layer
• CPC Class Codes: H01L 2224/13609 : Indium [In] as principal constituent
• CPC Class Codes: H01L 2224/16145 : the bodies being stacked
• CPC Class Codes: H01L 2224/16225 : the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/29099 : Material
• CPC Class Codes: H01L 2224/32225 : the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32245 : the item being metallic
• CPC Class Codes: H01L 2224/45099 : Material
• CPC Class Codes: H01L 2224/48091 : Arched
• CPC Class Codes: H01L 2224/48227 : connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48247 : connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48463 : the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
• CPC Class Codes: H01L 2224/73204 : the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73265 : Layer and wire connectors
• CPC Class Codes: H01L 2224/81011 : Chemical cleaning, e.g. etching, flux
• CPC Class Codes: H01L 2224/92247 : the second connecting process involving a wire connector
• CPC Class Codes: H01L 2225/06513 : Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 24/11 : Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 24/12 : Structure, shape, material or disposition of the bump connectors prior to the connecting process
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0001 : Technical content checked by a classifier
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00013 : Fully indexed content
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/0002 : Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01007 : Nitrogen [N]
• CPC Class Codes: H01L 2924/01012 : Magnesium [Mg]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01051 : Antimony [Sb]
• CPC Class Codes: H01L 2924/01073 : Tantalum [Ta]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01083 : Bismuth [Bi]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/04941 : TiN
• CPC Class Codes: H01L 2924/04953 : TaN
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/15151 : the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/15788 : Glasses, e.g. amorphous oxides, nitrides or fluorides
• CPC Class Codes: H01L 2924/181 : Encapsulation

Abstract

A method of assembling chips. A first chip and a second chip are provided. At least one conductive pillar is formed on the first chip, and a conductive connecting material is formed on the conductive pillar. The second chip also comprises at least one conductive pillar. The first chip is connected to the second chip via the conductive pillars and the conductive connecting material.

Claims

1. A chip package comprising:

a carrier comprising a glass substrate;

a first chip over said carrier and an opening in said glass substrate, wherein said opening passes completely through said glass substrate;

a first metal bump between said first chip and said carrier, wherein said first metal bump comprises a first copper pillar between said first chip and said carrier and a solder between said first copper pillar and said carrier, wherein said first copper pillar has a height greater than a vertical distance between a bottom end of said first copper pillar and said carrier;

a second chip located in said opening in said glass substrate, and a second metal bump located between said first chip and said second chip, wherein said second chip is connected to said first chip only through said second metal bump, wherein a first end of said second metal bump physically connects to said first chip and a second end of said second metal bump physically connects to said second chip;

an encapsulating material between said first chip and said glass substrate, wherein said encapsulating material covers said second chip and a top surface of said glass substrate, wherein said encapsulating material exposes a bottom surface of said glass substrate; and

multiple solder balls under said carrier.

2. The chip package of claim 1, wherein said solder comprises a tin-containing alloy.

3. The chip package of claim 2, wherein said tin-containing alloy comprises copper.

4. The chip package of claim 2, wherein said tin-containing alloy comprises silver.

5. The chip package of claim 2, wherein said tin-containing alloy comprises gold.

6. The chip package of claim 2, wherein said tin-containing alloy comprises lead.

7. The chip package of claim 1, wherein said second metal bump comprises a second copper pillar between said first and second chips.

8. The chip package of claim 1, wherein said second metal bump comprises a tin-containing alloy between said first and second chips.

9. The chip package of claim 8, wherein said tin-containing alloy comprises silver.

10. The chip package of claim 8, wherein said tin-containing alloy comprises gold.

11. A chip package comprising:

an organic substrate;

a first chip over said organic substrate;

a first copper bump between said first chip and said organic substrate, wherein said first copper bump has a height greater than a vertical distance between a bottom end of said first copper bump and said organic substrate;

a first tin-and-gold-containing alloy between said first copper bump and said organic substrate;

a second chip located in an opening in said organic substrate, and a metal bump located between said first chip and said second chip, wherein said second chip is connected to said first chip only through said metal bump, wherein a first end of said metal bump physically connects to said first chip and a second end of said metal bump physically connects to said second chip; and

an encapsulating material between said first chip and said organic substrate, wherein said encapsulating material contacts said first chip, said encapsulating material covering said second chip, a top surface of said organic substrate and a sidewall of said first copper bump said encapsulating material exposing a bottom surface of said organic substrate.

12. The chip package of claim 11, wherein said first tin-and-gold-containing alloy comprises silver.

13. The chip package of claim 11, wherein said metal bump comprises a second copper bump between said first and second chips.

14. The chip package of claim 11, wherein said metal bump comprises a tin-containing alloy between said first and second chips.

15. The chip package of claim 11, wherein said metal bump comprises a second tin-and-gold-containing alloy between said first and second chips.

16. The chip package of claim 11, wherein said metal bump comprises a tin-and-silver-containing alloy between said first and second chips.

17. The chip package of claim 11, wherein said first copper bump has a sidewall with a portion not covered by said tin-and-gold-containing alloy.

18. A chip package comprising:

a carrier comprising a glass substrate;

a first chip over said carrier and an opening in said glass substrate, wherein said opening passes completely through said glass substrate;

a first metal bump between said first chip and said carrier, wherein said first metal bump comprises a first copper pillar between said first chip and said carrier and a solder between said first copper pillar and said carrier, wherein said first copper pillar has a height greater than a vertical distance between a bottom end of said first copper pillar and said carrier, and greater than a height of said solder;

a second chip located in said opening in said glass substrate, and a second metal bump located between said first chip and said second chip, wherein said second chip is connected to said first chip only through said second metal bump, and wherein said second metal bump comprises a second copper pillar, and wherein a first end of said second metal bump physically connects to said first chip and a second end of said second metal bump physically connects to said second chip;

an encapsulating material between said first chip and said glass substrate, wherein said encapsulating material covers said second chip and a top surface of said glass substrate, wherein said encapsulating material exposes a bottom surface of said glass substrate; and

multiple solder balls under said carrier.