Analog to digital converter with adjustable conversion window

• US 8,421,666 B2
• Filed: 08/11/2011
• Issued: 04/16/2013
• Est. Priority Date: 08/11/2011
• Status: Expired due to Fees

• Current Assignee: Neodrón Limited (Atlantic IP Services Limited)
• Original Assignee: Atmel Corporation (Microchip Technology Incorporated)
• Inventors: Pedersen, Trond
• Primary Examiner(s): Nguyen, Khai M
• Application Number:
  US13/208,234
• Publication Number:
  US 20130038481A1
• Time in Patent Office: 614 Days
• Field of Search: 341/172, 341/155, 341/34, 341/33, 345/173
• US Class Current: 341/172
• CPC Class Codes: H03M 1/0604 at one point, i.e. by adjusting a single reference value, e.g. bias or gain error gain setting for range control H03M1/18
• CPC Class Codes: H03M 1/403 using switched capacitors

Abstract

In one embodiment, an apparatus includes a first capacitor system and a second capacitor system. Each capacitor system comprises one or more engaged capacitors from respective pluralities of selectively engagable capacitors. The first capacitor system and second capacitor system are respectively selectively coupled to a first reference voltage and a second reference voltage. The apparatus further includes a switch configured to transfer charge between the first capacitor system and the second capacitor system when the switch is closed such that the first capacitor system and the second capacitor system each store the same first voltage. The apparatus further includes a node coupled to the first capacitor system, the second capacitor system, and a first input of a differential amplifier of an analog to digital converter. The node is configured to bias the differential amplifier to the first voltage.

Claims

1. An apparatus comprising:

a first capacitor system having a first variable capacitance, the first variable capacitance based, at least in part, upon a number of engaged capacitors of a first plurality of selectively engagable capacitors, the first capacitor system selectively coupled to a first reference voltage;

a second capacitor system having a second variable capacitance, the second variable capacitance based, at least in part, upon a number of engaged capacitors of a second plurality of selectively engagable capacitors, the second capacitor system selectively coupled to a second reference voltage;

a switch coupled to the first capacitor system and the second capacitor system, the switch configured to transfer charge between the first capacitor system and the second capacitor system when the switch is closed such that the first capacitor system and the second capacitor system each store the same first voltage, the first voltage less than the first reference voltage; and

a node coupled to the first capacitor system, the second capacitor system, and a first input of a differential amplifier of an analog to digital converter, the node configured to bias the differential amplifier to the first voltage.

2. The apparatus of claim 1, wherein:

the second reference voltage is a ground of the apparatus and the first voltage is equal to the product of the first reference voltage and the number of engaged capacitors of the first plurality of selectively engagable capacitors divided by the number of engaged capacitors of the second plurality of selectively engagable capacitors.

3. The apparatus of claim 1, wherein:

the analog to digital converter has a variable conversion window that increases in effective resolution as the size of the conversion window decreases.

4. The apparatus of claim 1, further comprising:

a third capacitor system coupled to a second input of the differential amplifier of the analog to digital converter and configured to store a second voltage.

5. The apparatus of claim 4, further comprising:

a sensing circuit operable to be coupled to a capacitive touch sensor and transfer an amount of charge that is indicative of a measured capacitance of an area of the capacitive touch sensor to the third capacitor system.

6. The apparatus of claim 4, wherein:

the analog to digital converter is configured to convert the second voltage to a digital value.

7. The apparatus of claim 4, wherein:

the first capacitor system and the second capacitor system are collectively operable to store an intermediate result of an analog to digital conversion of the second voltage.

8. A method comprising:

engaging a number of capacitors of a first capacitor system comprising a first plurality of selectively engagable capacitors;

engaging a number of capacitors of a second capacitor system comprising a second plurality of selectively engagable capacitors;

coupling the first capacitor system to a first reference voltage;

coupling the second capacitor system to a second reference voltage;

transferring charge between the first capacitor system and the second capacitor system such that the first capacitor system and the second capacitor system each stores the same first voltage, the first voltage less than the first reference voltage; and

biasing a differential amplifier of an analog to digital converter to the first voltage by a node coupled to the first capacitor system, the second capacitor system, and the differential amplifier.

9. The method of claim 8, wherein:

the second reference voltage is a ground of the apparatus and the first voltage is equal to the product of the first reference voltage and the number of engaged capacitors of the first plurality of selectively engagable capacitors divided by the number of engaged capacitors of the second plurality of selectively engagable capacitors.

10. The method of claim 8, further comprising:

increasing a resolution of the analog to digital converter by decreasing the size of a conversion window of the analog to digital converter.

11. The method of claim 8, further comprising:

storing a second voltage by a third capacitor system; and

coupling the third capacitor system to a second input of the differential amplifier of the analog to digital converter.

12. The method of claim 11, further comprising:

coupling a sensing circuit to a capacitive touch sensor; and

transferring an amount of charge that is indicative of a measured capacitance of an area of the capacitive touch sensor to the third capacitor system.

13. The method of claim 11, further comprising:

converting, by the analog to digital converter, the second voltage to a digital value.

14. The method of claim 11, further comprising:

storing, by the first capacitor system and the second capacitor system, an intermediate result of an analog to digital conversion of the second voltage.

15. An apparatus, comprising:

a capacitive touch sensor comprising a plurality of nodes; and

a control unit coupled to the capacitive touch sensor, the control unit comprising;

a first capacitor system having a first variable capacitance, the first variable capacitance based, at least in part, upon a number of engaged capacitors of a first plurality of selectively engagable capacitors, the first capacitor system selectively coupled to a first reference voltage;

a second capacitor system having a second variable capacitance, the second variable capacitance based, at least in part, upon a number of engaged capacitors of a second plurality of selectively engagable capacitors, the second capacitor system selectively coupled to a second reference voltage;

a switch coupled to the first capacitor system and the second capacitor system, the switch configured to transfer charge between the first capacitor system and the second capacitor system when the switch is closed such that the first capacitor system and the second capacitor system each store the same first voltage, the first voltage less than the first reference voltage; and

a node coupled to the first capacitor system, the second capacitor system, and a first input of a differential amplifier of an analog to digital converter, the node configured to bias the differential amplifier to the first voltage.

16. The apparatus of claim 15, wherein:

the second reference voltage is a ground of the apparatus and the first voltage is equal to the product of the first reference voltage and the number of engaged capacitors of the first plurality of selectively engagable capacitors divided by the number of engaged capacitors of the second plurality of selectively engagable capacitors.

17. The apparatus of claim 15, wherein:

the analog to digital converter has a variable conversion window that increases in effective resolution as the size of the conversion window decreases.

18. The apparatus of claim 15, further comprising:

a third capacitor system coupled to a second input of the differential amplifier of the analog to digital converter and configured to store a second voltage.

19. The apparatus of claim 18, further comprising:

a sensing circuit coupled to the capacitive touch sensor and configured to transfer an amount of charge that is indicative of a measured capacitance of an area of the capacitive touch sensor to the third capacitor system.

20. The apparatus of claim 18, wherein:

the analog to digital converter is configured to convert the second voltage to a digital value by the analog to digital converter.

21. The apparatus of claim 18, wherein:

the first capacitor system and the second capacitor system are collectively operable to store an intermediate result of an analog to digital conversion of the second voltage.