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Fabrication method of trenched power MOSFET

  • US 8,426,275 B2
  • Filed: 09/06/2011
  • Issued: 04/23/2013
  • Est. Priority Date: 01/09/2009
  • Status: Active Grant
First Claim
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1. A fabrication method of a trenched power MOSFET, at least comprising steps of:

  • forming a pattern layer having a first opening on a substrate;

    removing a portion of the substrate by using the pattern layer as a mask, so as to form a gate trench in the substrate;

    expanding a width of the gate trench;

    after the step of expanding the width of the gate trench, forming a gate oxide layer on an inner surface of the gate trench;

    after the step of forming the gate oxide layer, removing a portion of the gate oxide layer on a bottom of the gate trench by using the pattern layer as a mask, so as to form a second opening exposing the substrate and located in the gate oxide layer, wherein a width of the expanded gate trench is greater than a width of the second opening;

    forming a thick oxide layer in the second opening;

    forming two first heavily doped regions at two sides of the thick oxide layer;

    forming a gate polysilicon structure in the gate trench;

    forming a body layer to surround the gate trench; and

    forming two source doped regions at two sides of the gate trench.

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