Driver circuit, display device including the driver circuit, and electronic device including the display device
First Claim
1. A driver circuit comprising plural stages of pulse output circuits, each of the pulse output circuits comprising:
- a first circuit for outputting an output signal in accordance with a potential of a first node and a potential of a second node;
a second circuit for supplying a signal corresponding to an output signal from a pulse output circuit in a preceding stage to the first node;
a third circuit for intermittently supplying a signal having a high power supply potential to the second node;
a first transistor for controlling the potential of the first node in accordance with the potential of the second node; and
a second transistor for controlling the potential of the second node,wherein the second node is electrically connected to a gate of the first transistor,wherein the signal corresponding to the output signal from the pulse output circuit in the preceding stage is supplied to a gate of the second transistor,wherein a fourth circuit for raising potentials of source terminals of the first and second transistors from a low power supply potential is provided between the source terminals of the first and second transistors and a wiring for supplying the low power supply potential,wherein a switch for setting the potentials of the source terminals of the first and second transistors to a low power supply potential is provided, andwherein the switch is controlled by a judgment circuit for judging whether the first and second transistors are enhancement transistors or depletion transistors.
1 Assignment
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Accused Products
Abstract
A driver circuit where malfunctions in the circuit can be suppressed even when a thin film transistor is changed into an enhancement transistor or a depletion transistor is provided. In a pulse output circuit, a circuit for raising potentials of source terminals of first and second transistors from low power supply potentials is provided between the source terminals of the first and second transistors and a wiring for supplying a low power supply potential. Further, a switch for setting the potentials of the source terminals of the first and second transistors to low power supply potentials is provided. The switch is controlled by a judgment circuit for judging whether the first and second transistors are enhancement transistors or depletion transistors.
119 Citations
8 Claims
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1. A driver circuit comprising plural stages of pulse output circuits, each of the pulse output circuits comprising:
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a first circuit for outputting an output signal in accordance with a potential of a first node and a potential of a second node; a second circuit for supplying a signal corresponding to an output signal from a pulse output circuit in a preceding stage to the first node; a third circuit for intermittently supplying a signal having a high power supply potential to the second node; a first transistor for controlling the potential of the first node in accordance with the potential of the second node; and a second transistor for controlling the potential of the second node, wherein the second node is electrically connected to a gate of the first transistor, wherein the signal corresponding to the output signal from the pulse output circuit in the preceding stage is supplied to a gate of the second transistor, wherein a fourth circuit for raising potentials of source terminals of the first and second transistors from a low power supply potential is provided between the source terminals of the first and second transistors and a wiring for supplying the low power supply potential, wherein a switch for setting the potentials of the source terminals of the first and second transistors to a low power supply potential is provided, and wherein the switch is controlled by a judgment circuit for judging whether the first and second transistors are enhancement transistors or depletion transistors. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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Specification