Image pickup apparatus

• US 8,427,558 B2
• Filed: 01/05/2010
• Issued: 04/23/2013
• Est. Priority Date: 02/29/2000
• Status: Expired due to Fees

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Inui, Fumihiro
• Primary Examiner(s): DIEP, TRUNG T
• Application Number:
  US12/652,276
• Publication Number:
  US 20100128151A1
• Time in Patent Office: 1,204 Days
• Field of Search: 348/241, 348/272, 348/308
• US Class Current: 348/241
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H04N 25/63 applied to dark current
• CPC Class Codes: H04N 25/633 by using optical black pixels
• CPC Class Codes: H04N 25/67 applied to fixed-pattern noise, e.g. non-uniformity of response
• CPC Class Codes: H04N 25/672 between adjacent sensors or output registers for reading a single image
• CPC Class Codes: H04N 25/767 Horizontal readout lines, multiplexers or registers
• CPC Class Codes: H04N 25/78 Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters

Abstract

There is provided an image pickup apparatus comprising two-dimensionally arrayed pixels, a plurality of read-out channels each including a read-out circuit and an amplifier circuit, a parallel-serial conversion circuit which sequentially selects pixel signals output via the plurality of read-out channels and outputs a series of pixel signals, and a clamp unit which clamps the reset level included in an output signal from the read-out circuit in order to remove an offset generated in each read-out channel.

Claims

1. A solid-state imaging apparatus comprising:

a plurality of pixels arranged along rows and columns; and

a plurality of read out channels, each arranged correspondingly to one of the columns, for reading out a signal from the plurality of pixels, and

a plurality of switches each corresponding to a respective one of the plurality of read out channels, for reading out the signal from each of the plurality of read out channels to a common output node;

wherein each of the plurality of read out channels includes;

a correlation double sampling circuit for receiving the signal read out from the plurality of pixels and reducing a noise contained in the signal;

an amplifier for amplifying the signal of which noise is reduced by the correlated double sampling circuit; and

an offset removing unit which includes a clamp unit, the offset removing unit for subjecting a signal outputted through the amplifier to an offset correction processing.

2. The solid-state imaging apparatus according to claim 1, wherein each of the plurality of pixels has a color filter.

3. The solid-state imaging apparatus according to claim 1, wherein the clamp unit clamps a reset level included in the signal outputted through the amplifier to a reference voltage.

4. The solid-state imaging apparatus according to claim 1, wherein the clamp unit comprises a voltage feedback clamp unit of which offset is adjusted by a feedback an output to an input of the voltage feedback clamp unit.

5. The solid-state imaging apparatus according to claim 1, wherein the clamp unit comprises a negative feedback clamp unit.