Plasma doping to reduce dielectric loss during removal of dummy layers in a gate structure

• US 8,431,453 B2
• Filed: 03/31/2011
• Issued: 04/30/2013
• Est. Priority Date: 03/31/2011
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Huang, Yu-Lien, Lin, Chia-Pin, Wang, Sheng-Hsiung, Hsu, Fan-Yi, Tai, Chun-Liang
• Primary Examiner(s): Smith, Zandra
• Assistant Examiner(s): DUONG, KHANH B
• Application Number:
  US13/077,358
• Publication Number:
  US 20120248550A1
• Time in Patent Office: 761 Days
• Field of Search: None
• US Class Current: 438/183
• CPC Class Codes: H01L 27/088 the components being field-effect transistors with insulated gate
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate

Abstract

The embodiments of methods and structures disclosed herein provide mechanisms of performing doping an inter-level dielectric film, ILD0, surrounding the gate structures with a dopant to reduce its etch rates during the processes of removing dummy gate electrode layer and/or gate dielectric layer for replacement gate technologies. The ILD0 film may be doped with a plasma doping process (PLAD) or an ion beam process. Post doping anneal is optional.

Claims

1. A method of doping an inter-level dielectric (ILD) layer surrounding a gate structure on a substrate to improve yield of the substrate, comprising:

removing excess inter-level dielectric of the ILD layer above the gate structure, wherein the gate structure includes a dummy gate electrode layer, and wherein the removal of the excess ILD exposes the dummy gate electrode layer;

doping a surface layer on the substrate with dopants, wherein the doped surface layer includes a doped ILD surface layer of the ILD layer; and

removing the exposed dummy gate electrode layer, wherein the doped ILD surface layer reduces the loss of the ILD layer during the removal of the exposed dummy gate electrode.

2. The method of claim 1, further comprising:

annealing the substrate after doping the surface layer of the substrate, wherein the annealing allows the dopants to settle in the doped surface layer.

3. The method of claim 1, wherein the ILD layer is a P-doped silicate glass (PSG) or an undoped silicate glass (USG) film deposited by high-density plasma chemical vapor deposition (HDPCVD).

4. The method of claim 1, wherein the dummy gate electrode layer is made of polysilicon, and wherein the removing of the exposed dummy gate electrode layer involves a wet etching process, and wherein the wet etching process uses a chemistry involving a mixture of diluted HF and NH₄OH.

5. The method of claim 4, wherein the removing of the exposed dummy gate electrode layer further involves a dry plasma etch process prior to using the wet etching process, and wherein the dry plasma etch process uses a mixture of HBr, Cl₂, and an inert carrier gas.

6. The method of claim 1, wherein the gate structure further comprises a dummy gate dielectric layer under the dummy gate electrode layer, wherein the dummy gate dielectric is made of SiO₂ and wherein the dummy gate dielectric layer is removed after the dummy gate electrode layer is removed, and wherein the dummy gate dielectric layer is removed by a dry etch using a mixture of HF and NH₃ to form a complex with the dummy gate dielectric layer.

7. The method of claim 1, wherein the dopants are made of carbon, boron, or a combination thereof.

8. The method of claim 1, wherein the surface layer is doped by an ion beam process with an energy in a range from about 0.5 KeV to about 60 KeV, a dosage in a range from about 5E18 atoms/cm³ to about 5E22 atoms/cm³, and at a doping temperature in a range from about −

150°

C. to about 25°

C.

9. The method of claim 1, wherein the surface layer is doped by a plasma doping (PLAD) process, and wherein the doping is performed by plasma doping with a carbon-containing gas.

10. The method of claim 9, wherein the carbon-containing gas is selected from a group consisting of CH₄, C_xH_y, or a combination thereof, and wherein x is in a range from 2 to 12 and y is in a range from 2 to 26.

11. The method of claim 9, wherein the carbon-containing gas is mixed with an inert gas selected from a group consisting of He, Ar, Ne, Kr, Xe, and H₂.

12. The method of claim 9, wherein a bias voltage is equal to or greater than about 0.5 KV, and wherein the dopant concentration of the doped ILD surface layer is equal to or greater than about 5E15 atoms/cm³.

13. The method of claim 9, wherein the doping plasma is a pulsed plasma with a duty ratio in a range from about 5% to about 95%.

14. A method of doping an inter-level dielectric (ILD) layer surrounding a gate structure on a substrate to improve yield of the substrate, comprising:

removing excess inter-level dielectric of the ILD layer above the gate structure, wherein the gate structure includes a dummy gate electrode layer and a dummy gate dielectric layer under the dummy gate electrode layer, and wherein the removal of the excess ILD exposes the dummy gate electrode layer;

doping a surface layer on the substrate with dopants, wherein the doped surface layer includes a doped ILD surface layer of the ILD layer; and

removing the exposed dummy gate electrode layer and the dummy gate dielectric layer underneath, wherein the doped ILD surface layer reduces the loss of the ILD layer during the removal of the exposed dummy gate electrode and the dummy gate dielectric layer.

15. A method of doping an inter-level dielectric (ILD) layer surrounding a gate structure on a substrate, comprising:

planarizing the ILD layer to expose a gate structure, wherein the gate structure includes a dummy gate electrode layer and sidewall spacers;

doping a surface layer of the substrate, the surface layer comprising the ILD layer, the dummy gate electrode layer and the sidewall spacers;

removing the dummy gate electrode layer, wherein the doped ILD surface layer reduces the loss of the ILD layer during the removal of the exposed dummy gate electrode and the dummy gate dielectric layer.

16. The method of claim 15, further comprising:

annealing the surface layer after doping the surface layer.

17. The method of claim 15, wherein doping the surface layer comprises doping the ILD layer to a dopant concentration ranging from 5E18 atoms/cm³ to 5E22 atoms/cm³.

18. The method of claim 15, wherein doping the surface layer comprises plasma doping comprising:

supplying a carbon-containing gas; and

supplying an inert gas, wherein a total gas flow rate of the carbon-containing gas and the inert gas ranges from 50 standard cubic centimeters (sccm) to 500 sccm.

19. The method of claim 18, wherein the plasma doping comprises growing a carbon film on the surface layer, the carbon film having a thickness up to 500 Angstroms.

20. The method of claim 15, wherein doping the surface layer comprises doping the surface layer to a depth ranging from 10 Angstroms to 200 Angstroms.