Amplifier

• US 8,432,217 B2
• Filed: 10/12/2011
• Issued: 04/30/2013
• Est. Priority Date: 05/19/2011
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Renesas Mobile Corporation (Renesas Electronics Corporation)
• Inventors: Heikkinen, Jari Johannes, Kaukovuori, Jouni Kristian, Riekki, Jonne Juhani
• Primary Examiner(s): Nguyen, Khanh V
• Application Number:
  US13/271,705
• Publication Number:
  US 20120293259A1
• Time in Patent Office: 566 Days
• Field of Search: 330/252, 330/253, 330/277, 330/283, 330/311
• US Class Current: 330/51
• CPC Class Codes: H03F 1/0277 Selecting one or more amplifiers from a plurality of amplifiers
• CPC Class Codes: H03F 1/223 with MOSFET's
• CPC Class Codes: H03F 1/26 Modifications of amplifiers to reduce influence of noise generated by amplifying elements
• CPC Class Codes: H03F 1/301 in MOSFET amplifiers H03F1/303, H03F1/305, H03F1/308 take precedence
• CPC Class Codes: H03F 1/565 using inductive elements
• CPC Class Codes: H03F 2200/135 there being a feedback over one or more internal stages in the global amplifier
• CPC Class Codes: H03F 2200/144 the feedback circuit of the amplifier stage comprising a passive resistor and passive capacitor
• CPC Class Codes: H03F 2200/156 One or more switches are realised in the feedback circuit of the amplifier stage
• CPC Class Codes: H03F 2200/159 the feedback circuit being closed during a switching time
• CPC Class Codes: H03F 2200/165 A filter circuit coupled to the input of an amplifier
• CPC Class Codes: H03F 2200/294 the amplifier being a low noise amplifier [LNA]
• CPC Class Codes: H03F 2200/39 Different band amplifiers are coupled in parallel to broadband the whole amplifying circuit
• CPC Class Codes: H03F 2203/45306 the common gate stage implemented as dif amp eventually for cascode dif amp
• CPC Class Codes: H03F 2203/45318 the AAC comprising a cross coupling circuit, e.g. two extra transistors cross coupled
• CPC Class Codes: H03F 2203/45386 the AAC comprising one or more coils in the source circuit
• CPC Class Codes: H03F 3/195 in integrated circuits
• CPC Class Codes: H03F 3/45179 using MOSFET transistors as the active amplifying circuit H03F3/45278 takes precedence
• CPC Class Codes: H03F 3/45188 Non-folded cascode stages
• CPC Class Codes: H03F 3/45645 Controlling the input circuit of the differential amplifier
• CPC Class Codes: H03F 3/72 Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
• CPC Class Codes: Y10T 29/49124 : On flat or curved insulated base, e.g., printed circuit, etc.

Abstract

A configurable low noise amplifier circuit which is configurable between a first topology in which the low noise amplifier circuit includes a degeneration inductance stage whereby the low noise amplifier circuit operates as an inductively degenerated low noise amplifier, and a second topology in which the low noise amplifier circuit includes a common-gate low noise amplifier stage whereby the low noise amplifier circuit operates as a common-gate low noise amplifier. The second topology includes one or more internal input impedance matching components and the first topology does not include the one or more internal input impedance matching components.

Claims

1. A configurable low noise amplifier circuit, said low noise amplifier circuit being configurable between one of:

a first topology in which said low noise amplifier circuit comprises a degeneration inductance stage whereby said low noise amplifier circuit operates as an inductively degenerated low noise amplifier; and

a second topology in which said low noise amplifier circuit comprises a common-gate low noise amplifier stage whereby said low noise amplifier circuit operates as a common-gate low noise amplifier,

wherein said common-gate low noise amplifier stage comprises a matching input transistor which acts as an internal input impedance matching component for said second topology, and

wherein said first topology does not comprise said matching input transistor and requires one or more components external to said low noise amplifier circuit for impedance matching.

2. A configurable low noise amplifier circuit according to claim 1, said circuit comprising a switching arrangement, said circuit being configurable between one of said first topology and said second topology via said switching arrangement.

3. A configurable low noise amplifier circuit according to claim 2, wherein said switching arrangement comprises:

a topology switching function connected between an output of said degeneration inductance stage and an input of said configurable low noise amplifier circuit,

wherein said circuit is configurable in said first topology by configuring said topology switching function in an open state, and

wherein said circuit is configurable in said second topology by configuring said topology switching function in a closed state.

4. A configurable low noise amplifier circuit according to claim 3, wherein said topology switching function comprises a switching transistor,

wherein said switching transistor is configurable in said open state via input of an open state configuration control signal to its input terminal, and

wherein said switching transistor is configurable in said closed state via input of a closed state configuration control signal to its input terminal.

5. A configurable low noise amplifier circuit according to claim 1, wherein said degeneration inductance stage comprises a first input transistor coupled to the input of said configurable low noise amplifier circuit and a degeneration inductor connected between a first output of said first input transistor and ground.

6. A configurable low noise amplifier circuit according to claim 5, wherein said degeneration inductance stage comprises a first bias resistor coupled to the input of said first input transistor and a first bias voltage.

7. A configurable low noise amplifier circuit according to claim 5, wherein said degeneration inductance stage comprises a first decoupling capacitor connected between the input of said configurable low noise amplifier circuit and the input of said first input transistor.

8. A configurable low noise amplifier circuit according to claim 1, wherein said common-gate low noise amplifier stage comprises an inductor operatively coupled to the matching input transistor, and

wherein said inductor is coupled to a first output of said matching input transistor and ground.

9. A configurable low noise amplifier circuit according to claim 8, wherein said common-gate low noise amplifier stage comprises a bias resistor coupled to the input of said matching input transistor and a bias voltage.

10. A configurable low noise amplifier circuit according to claim 8, wherein said degeneration inductance stage comprises a first input transistor coupled to the input of said configurable low noise amplifier circuit and a degeneration inductor connected between a first output of said first input transistor and ground, and

wherein said inductor of said common-gate amplifier stage comprises said degeneration inductor of said degeneration inductance stage, whereby said inductor remains in said circuit in both said first topology and said second topology.

11. A configurable low noise amplifier circuit according to claim 6, wherein said circuit comprises a switching arrangement, said circuit being configurable between one of said first topology and said second topology via said switching arrangement, said switching arrangement comprising:

a first bias voltage switching function adapted to set said first bias voltage to either a relatively high or a relatively low bias voltage,

wherein said configurable low noise amplifier circuit is configurable in said first topology by setting said first bias voltage to a relatively high bias voltage and configurable in said second topology by setting said first bias voltage to a relatively low bias voltage.

12. A configurable low noise amplifier circuit according to claim 9, wherein said circuit comprises a switching arrangement, said circuit being configurable between one of said first topology and said second topology via said switching arrangement, said switching arrangement comprising:

a bias voltage switching function adapted to set said bias voltage to either a relatively high or a relatively low bias voltage,

wherein said configurable low noise amplifier circuit is configurable in said first topology by setting said bias voltage to a relatively low bias voltage and configurable in said second topology by setting said bias voltage to a relatively high bias voltage.

13. A configurable low noise amplifier circuit according to claim 1, wherein said circuit comprises a common output terminal at which the output of said configurable low noise amplifier circuit is provided when configured in either said first topology or said second topology.

14. A configurable low noise amplifier circuit according to claim 1, said configurable low noise amplifier circuit comprising one or more current cascodes located before the output of the low noise amplifier circuit.

15. A configurable low noise amplifier circuit according to claim 6, wherein said common-gate low noise amplifier stage comprises an inductor operatively coupled to the matching input transistor,

wherein said inductor is coupled to a first output of said matching input transistor and ground,

wherein said common-gate low noise amplifier stage comprises a second bias resistor coupled to the input of said matching input transistor and a second bias voltage,

wherein said circuit comprises a switching arrangement, said circuit being configurable between one of said first topology and said second topology via said switching arrangement, said switching arrangement comprising:

a first bias voltage switching function adapted to set said first bias voltage to either a relatively high or a relatively low bias voltage,

a second bias voltage switching function adapted to set said second bias voltage to either a relatively high or a relatively low bias voltage,

wherein said configurable low noise amplifier circuit is configurable in said first topology by setting said first bias voltage to a relatively high bias voltage and configurable in said second topology by setting said first bias voltage to a relatively low bias voltage, and

wherein said configurable low noise amplifier circuit is configurable in said first topology by setting said second bias voltage to a relatively low bias voltage and configurable in said second topology by setting said second bias voltage to a relatively high bias voltage.

16. A configurable low noise amplifier circuit according to claim 1, said circuit comprising a configurable load connected to the output of said circuit.

17. A configurable low noise amplifier circuit according to claim 1, wherein said configurable low noise amplifier circuit comprises a differential amplifier, said stages forming one side of said differential amplifier.

18. A radio-frequency semiconductor integrated circuit comprising one or more configurable low noise amplifier circuits according to claim 1.

19. A radio-frequency module comprising one or more radio-frequency filter circuits coupled to one or more configurable low noise amplifier circuits according to claim 1.

20. A device comprising a configurable low noise amplifier circuit according to claim 1.

21. A method of manufacturing a low noise amplifier circuit according to claim 1.

22. A method of configuring a low noise amplifier circuit comprising:

enabling application of a first set of one or more control signals to said circuit to configure said circuit in a first topology in which said low noise amplifier circuit comprises a common-gate low noise amplifier stage which when configured as a degeneration inductance stage, said low noise amplifier circuit operates as an inductively degenerated low noise amplifier;

enabling application of a second set of one or more control signals to said circuit, different than the first set of one or more control signals, to configure said circuit in a second topology in which said low noise amplifier circuit comprises a common-gate low noise amplifier stage whereby said low noise amplifier circuit operates as a common-gate low noise amplifier; and

selectively switching between applying the first set of one or more control signals and applying the second set of one or more control signals to said circuit to alternately provide the first topology or the second topology,

wherein said common gate low noise amplifier stage comprises a matching input transistor which acts as an internal input impedance matching for said second topology, and

wherein said first topology does not comprise said matching input transistor and requires one or more components external to said low noise amplifier circuit for impedance matching.