Data storage device which serializes memory device ready/busy signals
First Claim
1. A data storage device comprising:
- a command bus;
a status bus;
multiple memory devices that are operably coupled to the command bus and to the status bus;
a controller comprising multiple channel controllers, wherein the channel controllers are operably coupled to the command bus and to the status bus and each of the channel controllers is arranged and configured to control one or more of the memory devices; and
multiple programmable logic devices that are operably coupled to the status bus, wherein each of the programmable logic devices is configured to;
retrieve a ready/busy signal from each of the memory devices under control of one of the channel controllers using the status bus;
serialize the ready/busy signals; and
communicate the serialized ready/busy signals to the channel controllers.
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Accused Products
Abstract
A data storage device may include a command bus, a status bus, multiple memory devices that are operably coupled to the command bus and to the status bus, and a controller including multiple channel controllers, where the channel controllers are operably coupled to the command bus and to the status bus and each of the channel controllers is arranged and configured to control one or more of the memory devices. The data storage device may include multiple programmable logic devices that are operably coupled to the status bus, where each of the programmable logic devices is configured to retrieve a ready/busy signal from each of the memory devices under control of one of the channel controllers using the status bus, serialize the ready/busy signals and communicate the serialized ready/busy signals to the channel controllers.
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Citations
19 Claims
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1. A data storage device comprising:
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a command bus; a status bus; multiple memory devices that are operably coupled to the command bus and to the status bus; a controller comprising multiple channel controllers, wherein the channel controllers are operably coupled to the command bus and to the status bus and each of the channel controllers is arranged and configured to control one or more of the memory devices; and multiple programmable logic devices that are operably coupled to the status bus, wherein each of the programmable logic devices is configured to; retrieve a ready/busy signal from each of the memory devices under control of one of the channel controllers using the status bus; serialize the ready/busy signals; and communicate the serialized ready/busy signals to the channel controllers. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method for determining a status of multiple memory devices, the method comprising:
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retrieving, by a programmable logic device, a ready/busy signal from each of multiple memory devices; serializing the retrieved ready/busy signals; and communicating the serialized ready/busy signals from the programmable logic device to a channel controller. - View Dependent Claims (10, 11, 12, 13)
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14. A programmable logic device having instructions stored thereon, wherein the instructions, when executed, cause the programmable logic device to:
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retrieve a ready/busy signal from each of multiple memory devices; serialize the retrieved ready/busy signals; and communicate the serialized ready/busy signals to a channel controller. - View Dependent Claims (15, 16, 17, 18, 19)
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Specification