Switch to perform non-destructive and secure disablement of IC functionality utilizing MEMS and method thereof

• US 8,436,638 B2
• Filed: 12/10/2010
• Issued: 05/07/2013
• Est. Priority Date: 12/10/2010
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Ebbers, Jonathan, Goodnow, Kenneth J., Shuma, Stephen G., Twombly, Peter A.
• Primary Examiner(s): Tran, Jany
• Application Number:
  US12/964,764
• Publication Number:
  US 20120146684A1
• Time in Patent Office: 879 Days
• Field of Search: 326/8
• US Class Current: 326/8
• CPC Class Codes: G06F 21/87 by means of encapsulation, e.g. for integrated circuits

Abstract

Structures and methods are provided for performing non-destructive and secure disablement of integrated circuit (IC) functionality. A structure for enabling non-destructive and secure disablement and re-enablement of the IC includes a micro-electrical mechanical structure (MEMS) initially set to a chip enable state. The structure also includes an activation circuit operable to set the MEMS device to an error state based on a detected predetermined condition of the IC. The IC is disabled when the MEMS device is in the error state.

Claims

1. A structure for enabling non-destructive and secure disablement and re-enablement of an integrated circuit (IC), comprising:

a micro-electrical mechanical structure (MEMS) initially set to a chip enable state; and

an activation circuit operable to set the MEMS device to an error state based on a detected predetermined condition of the IC,

wherein;

the IC is disabled when the MEMS device is in the error state; and

the activation circuit is operable to;

receive a condition notification signal that indicates the detected predetermined condition of the IC; and

set the MEMS to the error state based on the condition notification signal.

2. The structure of claim 1, wherein the activation circuit comprises a memory operable to store at least one predetermined condition of the IC that sets the MEMS to the error state.

3. The structure of claim 1, wherein the activation circuit generates a chip status signal that indicates whether the MEMS is in one of the chip enable state and the error state and outputs the chip status signal to at least one of the IC, a circuit in the IC, and another IC.

4. The structure of claim 1, wherein:

in the enable state, the MEMS forms a closed circuit including a power supply, a control module, and a component; and

in the error state, the MEMS breaks the closed circuit and disables the IC.

5. A structure for enabling non-destructive and secure disablement and re-enablement of an integrated circuit (IC), comprising:

a micro-electrical mechanical structure (MEMS) initially set to a chip enable state; and

an activation circuit operable to set the MEMS device to an error state based on a detected predetermined condition of the IC,

wherein the IC is disabled when the MEMS device is in the error state;

the structure further comprising;

an override circuit operable to assert an override signal to at least one of the MEMS and the activation circuit,

wherein the MEMS is reset to the chip enable state based on the override signal, and the IC is re-enabled when the MEMS is in the chip enable state.

6. The structure of claim 5, wherein the override circuit comprises:

a pin of the IC operable to assert the override signal to the at least one of the MEMS and the activation circuit, wherein a socket of another IC operable to fit onto the pin and to allow the override signal to be asserted to the pin.

7. The structure of claim 5, wherein:

the MEMS is contained in a voltage island that receives a power supply voltage in the chip enable state; and

the override circuit comprises a timer that delays a reactivation of the voltage island for at least one of a predetermined period of time and until an occurrence of an event.

8. The structure of claim 5, further comprising an electrostatic discharge (ESD) module that protects the structure from errors in a chip status signal, the condition notification signal, and the override signal during an ESD event.

9. A method for enabling non-destructive and secure disablement and re-enablement of an integrated circuit (IC), comprising:

setting a micro-electrical mechanical structure (MEMS) initially to a chip enable state; and

setting the MEMS to an error state based on a detected predetermined condition of the IC,

wherein the IC is disabled when the MEMS is in the error state,

the method further comprising;

receiving a condition notification signal that indicates the detected predetermined condition of the IC; and

setting the MEMS to the error state based on the condition notification signal.

10. The method of claim 9, storing at least one predetermined condition of the IC that sets the MEMS device to the error state.

11. The method of claim 9, further comprising:

generating a chip status signal that indicates whether the MEMS is in one of the chip enable state and the error state; and

outputting the chip status signal to at least one of the IC, a circuit in the IC, and another IC.

12. A method for enabling non-destructive and secure disablement and re-enablement of an integrated circuit (IC), comprising:

setting a micro-electrical mechanical structure (MEMS) initially to a chip enable state; and

setting the MEMS to an error state based on a detected predetermined condition of the IC,

wherein the IC is disabled when the MEMS is in the error state,

the method further comprising;

asserting an override signal to at least one of the MEMS and an activation circuit; and

resetting the MEMS to the chip enable state based on the override signal, wherein the IC is re-enabled when the MEMS is in the chip enable state.

13. The method of claim 12, further comprising allowing an override signal to be asserted on a pin of the IC fit into a socket of another IC.

14. The method of claim 12, wherein:

the MEMS is contained in a voltage island that receives a power supply voltage in the chip enable state; and

the resetting of the MEMS comprises delaying a reactivation of the voltage island for at least one of a predetermined period of time and until an occurrence of an event.

15. The method of claim 12, further comprising protecting from errors in a chip status signal, the condition notification signal, and the override signal during an ESD event.

16. A method for enabling non-destructive and secure disablement and re-enablement of an integrated circuit (IC), comprising:

setting a micro-electrical mechanical structure (MEMS) initially to a chip enable state;

receiving a condition notification signal that indicates a detected predetermined condition of the IC;

setting the MEMS to an error state based on the condition notification signal, wherein the IC is disabled when the MEMS is in the error state;

asserting an override signal to at least one of the MEMS and an activation circuit; and

resetting the MEMS to the chip enable state based on the override signal, wherein the IC is re-enabled when the MEMS is in the chip enable state.

17. The method of claim 16, further comprising allowing an override signal to be asserted on a pin of the IC fit into a socket of another IC.

18. The method of claim 17, further comprising:

generating a chip status signal that indicates whether the MEMS is in one of the chip enable state and the error state; and

outputting the chip status signal to at least one of the IC, a circuit in the IC, and another IC.

19. The method of claim 18, further comprising protecting from errors in the chip status signal, the condition notification signal, and the override signal during an ESD event.