Method and system for transmission or reception of FM signals utilizing a DDFS clocked by an RFID PLL

• US 8,437,706 B2
• Filed: 04/05/2011
• Issued: 05/07/2013
• Est. Priority Date: 03/19/2007
• Status: Active Grant

• Current Assignee: NXP USA, Inc. (NXP Semiconductors NV)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Rofougaran, Ahmadreza, Rofougaran, Maryam
• Primary Examiner(s): Afshar, Kamran
• Assistant Examiner(s): Behnamian, Shahriar
• Application Number:
  US13/080,036
• Publication Number:
  US 20110183631A1
• Time in Patent Office: 763 Days
• Field of Search: 455/552.1, 455/41.2, 455/185.1, 340/10.1, 340/572.1, 340/5.53
• US Class Current: 455/73
• CPC Class Codes: H03F 2200/129 there being a feedback over the complete amplifier
• CPC Class Codes: H03F 2200/156 One or more switches are realised in the feedback circuit of the amplifier stage
• CPC Class Codes: H03F 2200/294 the amplifier being a low noise amplifier [LNA]
• CPC Class Codes: H03F 2200/451 the amplifier being a radio frequency amplifier
• CPC Class Codes: H03F 2203/7236 the gated amplifier being switched on or off by putting into parallel or not, by choosing between amplifiers by (a ) switch(es)
• CPC Class Codes: H03F 3/211 using a combination of several amplifiers H03F3/60 takes precedence
• CPC Class Codes: H03F 3/245 with semiconductor devices only
• CPC Class Codes: H03F 3/72 Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal
• CPC Class Codes: H03G 3/3068 Circuits generating control signals for both R.F. and I.F. stages
• CPC Class Codes: H03G 3/3078 Circuits generating control signals for digitally modulated signals

Abstract

Aspects of a method and system for transmission or reception of signals utilizing a DDFS clocked are provided. A first oscillator signal utilized for transmission and/or reception of signals of a first wireless communication protocol may be generated, and a direct digital frequency synthesizer (DDFS) may be clocked by the first oscillator signal to generate one or more second oscillator signals. The one or more second oscillator signals may be modulated to generate a signal adhering to a second wireless communication protocol. The one or more second oscillator signals may be utilized to demodulate signals of the second wireless communication protocol. A control word input to the DDFS may control a frequency of the one or more second oscillator signals generated by the DDFS. Simultaneous transmission and reception of signals of the second wireless communication protocol may be simulated by switching the control word input to the DDFS between two values.

Claims

1. A method comprising:

generating a first oscillator signal utilized for transmission and/or reception of signals in a first wireless communication system; and

clocking a direct digital frequency synthesizer (DDFS) by said first oscillator signal to generate one or more second oscillator signals;

adjusting a control word input to said DDFS for holding constant a frequency of said one or more second oscillator signals when a frequency of said first oscillator signal varies;

wherein;

said one or more second oscillator signals are modulated to generate a signal in a second wireless communication system; and

/or

said one or more second oscillator signals are utilized to demodulate signals in said second wireless communication system.

2. The method according to claim 1, comprising simulating simultaneous transmission and reception of signals in said second wireless communication system by switching said control word input to said DDFS between two values.

3. The method according to claim 1, comprising switching said control word input to said DDFS between two values in successive time intervals to perform time-division duplexing of transmission and reception of said signals in said second wireless communication system.

4. The method according to claim 3, wherein said transmission of said signals in said second wireless communication system occurs at a first frequency and said reception of said signals in said second wireless communication system occurs at a second frequency.

5. The method according to claim 1, wherein said frequency of said first oscillator signal is within one of the following frequency bands:

868 MHz to 928 MHz, 2.4 GHz to 2.483 GHz, and 5.725 to 5.875 GHz.

6. The method according to claim 1, wherein said frequency of each of said one or more second oscillator signals is within a frequency band of 60 MHz to 130 MHz.

7. The method according to claim 1, wherein each of said one or more signals comprises an in-phase component and a quadrature-phase component.

8. The method according to claim 1, comprising generating said first oscillator signal via a phase locked loop.

9. The method according to claim 8, wherein said phase locked loop operates at a substantially fixed frequency.

10. A system comprising:

one or more circuits comprising a direct digital frequency synthesizer (DDFS), said one or more circuits being operable to;

generate a first oscillator signal utilized for transmission and/or reception of signals in a first wireless communication system;

clock said DDFS by said first oscillator signal to generate one or more second oscillator signals;

adjust a control word input to said DDFS for holding constant a frequency of said one or more second oscillator signals when a frequency of said first oscillator signal varies;

wherein;

said one or more second oscillator signals are modulated to generate a signal in a second wireless communication system; and

/or

said one or more second oscillator signals are utilized to demodulate signals in said second wireless communication system.

11. The system according to claim 10, wherein said one or more circuits are operable to simulate simultaneous transmission and reception of signals in said second wireless communication system by switching said control word input to said DDFS between two values.

12. The system according to claim 10, wherein said one or more circuits switches said control word input to said DDFS between two values in successive time intervals to perform time-division duplexing of transmission and reception of signals in said second wireless communication system.

13. The system according to claim 12, wherein said transmission of said signals in said second wireless communication system occurs at a first frequency and said reception in said second wireless communication system occurs at a second frequency.

14. The system according to claim 10, wherein said frequency of said first oscillator signal is within one of the following frequency bands:

868 MHz to 928 MHz, 2.4 GHz to 2.483 GHz, and 5.725 to 5.875 GHz.

15. The system according to claim 10, wherein said frequency of each of said one or more second oscillator signals is within a frequency band of 60 MHz to 130 MHz.

16. The system according to claim 10, wherein each of said one or more second oscillator signals comprises an in phase component and a quadrature component.

17. The system according to claim 10, wherein said one or more circuits comprise a phase locked loop that generates said first oscillator signal.

18. The system according to claim 17, wherein said phase locked loop operates at a substantially fixed frequency.