Semiconductor device and structure
First Claim
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1. A method of manufacturing a semiconductor device, the method comprising:
- preparing a first monocrystalline layer comprising first transistors, wherein said first transistors are part of peripheral memory control circuits;
preparing a second monocrystalline layer comprising second monocrystalline layer semiconductor regions, said second monocrystalline layer overlying said first monocrystalline layer;
preparing a third monocrystalline layer comprising third monocrystalline layer semiconductor regions, said third monocrystalline layer overlying said second monocrystalline layer; and
etching portions of said second monocrystalline layer and portions of said third monocrystalline layer as part of forming at least one second transistor at least partly within said second monocrystalline layer.
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Abstract
A method of manufacturing a semiconductor wafer, the method comprising: providing a base wafer comprising a semiconductor substrate; preparing a first monocrystalline layer comprising semiconductor regions; preparing a second monocrystalline layer comprising semiconductor regions overlying the first monocrystalline layer; and etching portions of said first monocrystalline layer and portions of said second monocrystalline layer as part of forming at least one transistor on said first monocrystalline layer.
563 Citations
20 Claims
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1. A method of manufacturing a semiconductor device, the method comprising:
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preparing a first monocrystalline layer comprising first transistors, wherein said first transistors are part of peripheral memory control circuits; preparing a second monocrystalline layer comprising second monocrystalline layer semiconductor regions, said second monocrystalline layer overlying said first monocrystalline layer; preparing a third monocrystalline layer comprising third monocrystalline layer semiconductor regions, said third monocrystalline layer overlying said second monocrystalline layer; and etching portions of said second monocrystalline layer and portions of said third monocrystalline layer as part of forming at least one second transistor at least partly within said second monocrystalline layer. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method of manufacturing a semiconductor device, the method comprising:
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preparing a first monocrystalline layer comprising first semiconductor regions; preparing a second monocrystalline layer comprising second semiconductor regions, said second monocrystalline layer overlying the first monocrystalline layer; preparing a third monocrystalline layer comprising third semiconductor regions, said third monocrystalline layer overlying the second monocrystalline layer; and etching portions of said first monocrystalline layer and portions of said second monocrystalline layer as part of forming at least one first transistor at least partly within said first monocrystalline layer; wherein preparing said first monocrystalline layer comprises performing a first lithography process on said first monocrystalline layer; and wherein preparing said second monocrystalline layer comprises performing a second lithography process on said second monocrystalline layer. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A method of manufacturing a semiconductor device, the method comprising:
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preparing a first monocrystalline layer comprising first semiconductor regions; preparing a second monocrystalline layer comprising second semiconductor regions, said second monocrystalline layer overlying the first monocrystalline layer; and etching portions of said first monocrystalline layer and portions of said second monocrystalline layer as part of forming at least one first transistor at least partly within said first monocrystalline layer; wherein said first monocrystalline layer comprises a plurality of memory cell control lines. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification