Methods for manufacturing low noise chemically-sensitive field effect transistors
First Claim
1. A method for manufacturing a chemically-sensitive field effect transistor (chemFET), the method comprising:
- forming a gate dielectric on a semiconductor substrate; and
forming a floating gate structure on the gate dielectric, comprising;
forming a gate element on the gate dielectric;
forming a first conductive element and a sensor plate in a first conductor layer overlying the gate element, wherein the first conductive element is electrically connected to the gate element, and the sensor plate is electrically isolated from the gate element; and
forming a jumper element in a second conductor layer overlying the first conductor layer, the jumper element electrically connecting the sensor plate to the first conductive element; and
forming a passivation layer over the sensor plate.
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Abstract
Methods and apparatus relating to very large scale FET arrays for analyte measurements. ChemFET (e.g., ISFET) arrays may be fabricated using conventional CMOS processing techniques based on improved FET pixel and array designs that increase measurement sensitivity and accuracy, and at the same time facilitate significantly small pixel sizes and dense arrays. Improved array control techniques provide for rapid data acquisition from large and dense arrays. Such arrays may be employed to detect a presence and/or concentration changes of various analyte types in a wide variety of chemical and/or biological processes. In one example, chemFET arrays facilitate DNA sequencing techniques based on monitoring changes in hydrogen ion concentration (pH), changes in other analyte concentration, and/or binding events associated with chemical processes relating to DNA synthesis.
447 Citations
12 Claims
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1. A method for manufacturing a chemically-sensitive field effect transistor (chemFET), the method comprising:
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forming a gate dielectric on a semiconductor substrate; and forming a floating gate structure on the gate dielectric, comprising; forming a gate element on the gate dielectric; forming a first conductive element and a sensor plate in a first conductor layer overlying the gate element, wherein the first conductive element is electrically connected to the gate element, and the sensor plate is electrically isolated from the gate element; and forming a jumper element in a second conductor layer overlying the first conductor layer, the jumper element electrically connecting the sensor plate to the first conductive element; and forming a passivation layer over the sensor plate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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Specification