Compensation for parasitic capacitance of a capacitive sensor

• US 8,446,158 B1
• Filed: 11/07/2008
• Issued: 05/21/2013
• Est. Priority Date: 11/09/2007
• Status: Active Grant

• Current Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Jansson, Hakan Karl
• Primary Examiner(s): NATALINI, JEFF WILLIAM
• Application Number:
  US12/267,487
• Time in Patent Office: 1,656 Days
• Field of Search: 324/686
• US Class Current: 324/686
• CPC Class Codes: G06F 3/0418 for error correction or compensation, e.g. based on parallax, calibration or alignment
• CPC Class Codes: G06F 3/04182 Filtering of noise external to the device and not generated by digitiser components
• CPC Class Codes: G06F 3/044 by capacitive means
• CPC Class Codes: H03K 17/9622 using a plurality of detectors, e.g. keyboard
• CPC Class Codes: H03K 2217/94031 Calibration involving digital processing
• CPC Class Codes: H03K 2217/960715 Rc-timing; e.g. measurement of variation of charge time or discharge time of the sensor
• CPC Class Codes: H03K 2217/960725 Charge-transfer

Abstract

An apparatus for converting a capacitance measured on a capacitive sensor to a digital code may include a modulation capacitor to receive charge transferred from the sensor and compensation circuitry to divert charge from the modulation capacitor. A method for operating the apparatus may include generating a digital bitstream based on the capacitance of the sensor and compensating for a parasitic capacitance of the capacitive sensor.

Claims

1. An apparatus, comprising:

a sensor capacitor;

a modulation capacitor coupled with the sensor capacitor and configured to receive charge from the sensor capacitor;

compensation circuitry coupled with the sensor capacitor and the modulation capacitor, wherein the compensation circuitry is configured to divert a portion of the charge from the modulation capacitor, and wherein the portion of the charge diverted is based on an amount of a parasitic capacitance of the sensor capacitor measured during a calibration of the compensation circuitry; and

a comparator circuit coupled with the modulation capacitor, wherein the comparator circuit is configured to discharge the modulation capacitor in response to detecting that the charge on the modulation capacitor exceeds a predetermined threshold;

wherein the comparator circuit produces a digital code based on a frequency of the discharge of the modulation capacitor.

2. The apparatus of claim 1, wherein the compensation circuitry comprises a resistor.

3. The apparatus of claim 1, wherein the compensation circuitry comprises a switch controlled by a pulse width modulator (PWM) circuit.

4. The apparatus of claim 3, wherein the switch is configured to change an impedance of the current path.

5. The apparatus of claim 1, wherein the compensation circuitry comprises a current digital to analog converter (IDAC).

6. The apparatus of claim 5, wherein the IDAC is configured to divert a portion of the charge attributable to a parasitic capacitance of the sensor capacitor.

7. The apparatus of claim 1, wherein the compensation circuitry comprises a switched capacitor.

8. The apparatus of claim 7, wherein a switch alternately connects the switched capacitor to ground and to the modulation capacitor.

9. The apparatus of claim 1, wherein the portion of the charge is attributable to a parasitic capacitance of the sensor capacitor.

10. A method, comprising:

charging a sensor capacitor;

transferring charge from the sensor capacitor to a modulation capacitor;

generating a digital bitstream based on a capacitance of the sensor capacitor; and

compensating for a parasitic capacitance of the sensor capacitor by diverting charge from the modulation capacitor through compensation circuitry, and wherein an amount of the diverted charge is based on an amount of the parasitic capacitance measured during a calibration of the compensation circuitry.

11. The method of claim 10, further comprising:

discharging the modulation capacitor in response to detecting that the charge on the modulation capacitor exceeds a predetermined threshold; and

producing a digital code based on a frequency of the discharge of the modulation capacitor.

12. The method of claim 11, wherein the compensation circuitry comprises a resistor.

13. The method of claim 11, wherein the compensation circuitry comprises a switch controlled by a pulse width modulator (PWM) circuit.

14. The method of claim 13, further comprising using the switch to change an impedance of the current path.

15. The method of claim 11, wherein the compensation circuitry comprises a current digital to analog converter (IDAC).

16. The method of claim 15, wherein the IDAC is configured to divert a portion of the charge attributable to a parasitic capacitance of the sensor capacitor.

17. The method of claim 11, wherein the compensation circuitry comprises a switched capacitor.

18. The method of claim 17, wherein a switch alternately connects the switched capacitor to ground and then to the modulation capacitor.

19. The method of claim 11, wherein the compensation circuitry is configured to divert the portion of the charge attributable to a parasitic capacitance of the sensor capacitor.

20. An apparatus, comprising:

means for generating a digital bitstream based on a capacitance of a sensor capacitor; and

means for compensating for a parasitic capacitance of the sensor capacitor by diverting charge from a modulation capacitor through compensation circuitry, and wherein an amount of the diverted charge is based on an amount of the parasitic capacitance measured during a calibration of the compensation circuitry.

21. The apparatus of claim 20, further comprising means for diverting current attributable to the parasitic capacitance of the sensor capacitor.