Allocation and efficient use of display memory bandwidth

• US 8,446,421 B2
• Filed: 04/24/2009
• Issued: 05/21/2013
• Est. Priority Date: 04/24/2009
• Status: Active Grant

• Current Assignee: Columbia Peak Ventures, LLC (Dominion Harbor Enterprises, LLC)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Low, Yun Shon, Jeffrey, Eric
• Primary Examiner(s): Xiao, Ke
• Assistant Examiner(s): TRAN, KIM THANH THI
• Application Number:
  US12/429,593
• Publication Number:
  US 20100271380A1
• Time in Patent Office: 1,488 Days
• Field of Search: 345/536, 345/558
• US Class Current: 345/536
• CPC Class Codes: G09G 2310/04 Partial updating of the display screen
• CPC Class Codes: G09G 2310/061 for resetting or blanking
• CPC Class Codes: G09G 3/344 based on particles moving in a fluid or in a gas, e.g. electrophoretic devices electrophoretic devices per se G02F1/167
• CPC Class Codes: G09G 5/363 Graphics controllers
• CPC Class Codes: G09G 5/395 Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen G09G5/399 takes precedence

Abstract

A method includes fetching first synthesized pixels from an update buffer of a memory and fetching data pixels from an image buffer of the memory during the first drive frame period. Respective data pixels are fetched synchronously with the fetching of corresponding first synthesized pixels. Respective data pixels fetched from the image buffer are synthesized with corresponding first synthesized pixels to generate second synthesized pixels. The second synthesized pixels are stored in the update buffer during the first drive frame period. The storing of second synthesized pixels may be paused based on a prediction that the fetching of first synthesized pixels will not complete within the first drive frame period. The fetching of data pixels from the image buffer of the memory may also be paused based on the prediction that the fetching of first synthesized pixels will not complete within the first drive frame period.

Claims

1. A method for generating synthesized pixels, comprising:

during a current drive frame period of a plurality of drive frame periods for writing to an image pixel of a display device;

(a) actuating the fetching of one of a plurality of existing synthesized pixels stored in an update buffer, each existing synthesized pixel corresponding to an image pixel of the display device, each existing synthesized pixel having a data structure including the current display state of its corresponding image pixel and the immediately previous display state of its corresponding image pixel;

(b) actuating the fetching of one or more data pixels from an image buffer, each data pixel corresponding to an image pixel of the display device, each data pixel specifying a next display state to replace the current display state of its corresponding image pixel;

(c) actuating the generating of a new synthesized pixel for each fetched data pixel and the storing of the generated new synthesized pixel in said update buffer, wherein each new synthesized pixel has a data structure including the next display state for a corresponding image pixel as specified by the image pixel'"'"'s corresponding data pixel and including the current display state of the corresponding image pixel as specified by the image pixel'"'"'s corresponding existing synthesized pixel; and

(d) pausing the generating and storing of new synthesized pixels in response to a determination that its continued execution will prevent the display device'"'"'s minimum frame rate from being maintained.

2. The method of claim 1, further comprising pausing the fetching of the data pixels from the image buffer in response to a determination that its continued execution will prevent the display device'"'"'s minimum frame rate from being maintained.

3. The method of claim 1, wherein:

in (d), the generating and storing of new synthesized pixels is paused for the remainder of the current drive frame period; and

returning to (a) in the next frame period following the current frame period of said plurality of drive frame periods.

4. The method of claim 1, further comprising ceasing all read and write accesses to the image buffer for a remainder of the current drive frame period in response to a determination that continued read and write accessed to the image buffer will prevent the display device'"'"'s minimum frame rate from being maintained.

5. The method of claim 1, further comprising providing drive pulses corresponding with the existing synthesized pixels to the display device during the first drive frame period.

6. The method of claim 1, wherein the existing synthesized pixels and the data pixels are fetched synchronously.

7. The method of claim 1, wherein in (d), the determination that continued generating and storing of new synthesized pixels will prevent the display device'"'"'s minimum frame rate from being maintained is based on monitoring the level of fullness of at least one buffer used to store drive pulse data for altering the display state of an image pixel.

8. The method of claim 1, wherein in (d), the determination that continued generating and storing of new synthesized pixels will prevent the display device'"'"'s minimum frame rate from being maintained is based on monitoring the amount of memory bandwidth remaining in the first drive frame.

9. The method of claim 1, wherein in (d), the determination that continued generating and storing of new synthesized pixels will prevent the display device'"'"'s minimum frame rate from being maintained is based on monitoring the elapsed amount of time in the first drive frame.

19. The method of claim 1, wherein in (a), wherein said actuating of the fetching of one of a plurality of existing synthesized pixels, actuates the fetching of all existing synthesized pixels within the current drive frame.

10. An apparatus, comprising:

a memory including an image buffer and an update buffer;

a first unit coupled to fetch existing synthesized pixels stored in the update buffer, each existing synthesized pixel corresponding to an image pixel of a display device, each existing synthesized pixel having a data structure including the current display state of its corresponding image pixel and the immediately previous display state of its corresponding image pixel;

a second unit coupled to fetch data pixels from the image buffer, each data pixel corresponding to an image pixel of the display device, each data pixel specifying a next display state to replace the current display state of its corresponding image pixel; and

a control unit coupled to implement the following process steps;

during a current drive frame period of a plurality of drive frame periods for writing to an image pixel of said display device;

(a) actuating said first unit to fetch existing synthesized pixels from said update buffer;

(b) actuating said second unit to fetch data pixels from the image buffer;

(c) actuating the generating of a new synthesized pixel for each fetched data pixel that indicates a next display state for its corresponding image pixel and the storing the generated new synthesized pixels in the update buffer, wherein each new synthesized pixel has a data structure including the next display state for a corresponding image pixel as specified by the image pixel'"'"'s corresponding data pixel and including the current display state of the corresponding image pixel as specified by the image pixel'"'"'s corresponding existing synthesized pixel; and

(d) pausing the generating and storing of new synthesized pixels in response to determining that its continued execution will prevent the display device'"'"'s minimum frame rate from being maintained.

11. The apparatus of claim 10, wherein

in step (d), the generating and storing of new synthesized pixels is paused for the remainder of the current drive frame period;

and

returning to step (a) in the next frame period following the current frame period of said plurality of drive frame periods.

12. The apparatus of claim 10, wherein said control unit is further coupled to cease all read and write accesses to the image buffer for a remainder of the current drive frame period in response to determining that continued read and write access to the image buffer will prevent the display device'"'"'s minimum frame rate from being maintained.

13. The apparatus of claim 10, wherein the apparatus is coupled to actuate the applying of drive pulses corresponding to the existing synthesized pixels to the display device during the current drive frame period.

14. The apparatus of claim 10, wherein the first unit fetches existing synthesized pixels synchronously with the fetching of data pixels by the second unit.

15. The apparatus of claim 10, further comprising at least one buffer to store drive pulse data for altering the display state of an image pixel, wherein the determining that continued generating and storing of new synthesized pixels will prevent the display device'"'"'s minimum frame rate from being maintained is based on monitoring the level of fullness of the at least one buffer.

20. The apparatus of claim 10, wherein in step (a) the first unit is actuated to fetch all existing synthesized pixels from said update buffer.

16. A system, comprising:

a display device having display pixels that are updated from their current display state to their next display state in two or more drive frame periods;

a memory including an image buffer and an update buffer;

a first unit coupled to fetch all first synthesized pixels stored in the update buffer, each first synthesized pixel corresponding to an image pixel of the display device, each first synthesized pixel having a data structure including the current display state of its corresponding image pixel and the immediately previous display state of its corresponding image pixel;

a second unit to;

fetch one or more data pixels from the image buffer, the data pixels corresponding with pixel locations within a submatrix of a display matrix of the display device, each data pixel specifying the next display state of its corresponding image pixel;

generate one or more second synthesized pixels and store the generated second synthesized pixels in the update buffer each second synthesized pixel having a data structure including the next display state for a corresponding image pixel as specified by the image pixel'"'"'s corresponding data pixel and including the current display state of the corresponding image pixel as specified by the image pixel'"'"'s corresponding first synthesized pixel; and

a third unit to predict whether the fetching all first synthesized pixels will not complete within a first drive frame period and to pause the generating and storing of the second synthesized pixels based on a prediction that the fetching all first synthesized pixels will not complete within a first drive frame period.

17. The system of claim 16, wherein the third unit is operable to resume the generating and storing of the second synthesized pixels in a second drive frame period subsequent to the first drive frame period.

18. The system of claim 16, wherein the first unit provides fetched first synthesized pixels to the second unit, the second unit generating second synthesized pixels based at least in part on data included in the fetched first synthesized pixels.