Display panel and display apparatus

• US 8,446,539 B2
• Filed: 11/26/2007
• Issued: 05/21/2013
• Est. Priority Date: 03/13/2007
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Hirato, Shinichi
• Primary Examiner(s): KIM, RICHARD H
• Application Number:
  US12/522,489
• Publication Number:
  US 20090322715A1
• Time in Patent Office: 2,003 Days
• Field of Search: None
• US Class Current: 349/54
• CPC Class Codes: G02F 1/136259 Repairing; Defects
• CPC Class Codes: G02F 1/136272 Auxiliary lines
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 2201/40 Arrangements for improving the aperture ratio

Abstract

Each of spare lines (EL1 through ELn) is provided, for a corresponding one of source lines (SL1 through SLn), at one end of a pixel (PIX) on the side facing a source line SL of the pixel (PIX). A source line (SLi) and a spare line (ELi) are connected via a connection line (61). This makes it possible to realize a display panel in which a data signal line and a corresponding spare line are unlikely to have a breaking that causes their electrical connections not to be kept up to their ends, in an arrangement in which spare lines are provided for respective data signal lines.

Claims

1. An active matrix display panel comprising:

spare lines provided for respective data signal lines, the spare lines each connected with a corresponding one of the data signal lines via a plurality of connection lines,

each of the spare lines being away from a corresponding one of the data signal lines, in a direction in which scanning signal lines extend, so that a whole aperture region of a pixel connected with the corresponding one of the data signal lines is sandwiched between the each of the spare lines and the corresponding one of the data signal lines; and

wherein;

storage capacitance lines for causing pixels to have respective storage capacitances are provided, for respective lines of the pixels, so as to (i) be away from a corresponding one of the plurality of scanning signal lines in a direction in which the data signal lines extend and (ii) extend in a direction intersecting with a direction in which the data signal lines and the plurality of spare lines extend;

there are first columns of pixels, among a plurality of columns of pixels, each having a pixel column line which is connected with the respective storage capacitance lines at intersections of the pixel column line and the storage capacitance lines, the pixel column line being at least one of a corresponding one of the data signal lines and a corresponding one of the plurality of spare lines;

in each of the first columns of pixels,

in a case where the storage capacitance lines connected with the pixel column line at the intersections are first storage capacitance lines,

a first storage capacitance line is connected with a spare line of a second column of pixels which is different from the first columns of pixels, at intersections between the first storage capacitance line and the spare line of the second column of pixels, so as to be connected across first storage capacitance lines via the spare line;

a first segment that includes all connecting points between the pixel column line and the spare line of the second column of pixels is separated from the first storage capacitance line;

a second segment is separated from the spare line of the second column of pixels so that the second segment is separated from a data signal line of the second column of pixels, the second segment including connecting points between the first storage capacitance lines and the spare line of the second column of pixels.

2. The display panel as set forth in claim 1, wherein a voltage is applied via both ends of each of the plurality of storage capacitance lines.