Methods of making a semiconductor memory device
First Claim
Patent Images
1. A method for making a semiconductor memory device, the method comprising:
- forming isolation regions in semiconductor material;
removing portions of the semiconductor material between the isolation regions to form a floating body semiconductor material island and to form a void beneath the island over unremoved semiconductor material;
forming a bias gate within the void;
forming a field effect transistor gate over the floating body semiconductor material island; and
forming source/drain regions operatively proximate the field effect transistor gate.
7 Assignments
0 Petitions
Accused Products
Abstract
One-transistor (1T) capacitor-less DRAM cells each include a MOS transistor having a bias gate layer that separates a floating body region from a base substrate. The MOS transistor functions as a storage device, eliminating the need of the storage capacitor. Logic “1” is written to and stored in the storage device by causing majority carriers (holes in an NMOS transistor) to accumulate and be held in the floating body region next to the bias gate layer, and is erased by removing the majority carriers from where they are held.
-
Citations
28 Claims
-
1. A method for making a semiconductor memory device, the method comprising:
-
forming isolation regions in semiconductor material; removing portions of the semiconductor material between the isolation regions to form a floating body semiconductor material island and to form a void beneath the island over unremoved semiconductor material; forming a bias gate within the void; forming a field effect transistor gate over the floating body semiconductor material island; and forming source/drain regions operatively proximate the field effect transistor gate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
-
-
15. A method for making a transistor, comprising:
-
forming laterally opposing isolation regions in semiconductor material; laterally supporting a channel region of the transistor above a void in the semiconductor material by lateral engagement of the channel region with the laterally opposing isolation regions while forming conductive material below the channel region within the void; forming a field effect transistor gate over the channel region; and forming source/drain regions operatively proximate the field effect transistor gate. - View Dependent Claims (16, 17)
-
-
18. A method for making a transistor, comprising:
-
forming laterally opposing isolation regions in semiconductor material; elevationally supporting a channel region of the transistor above a void in the semiconductor material by engagement of the channel region with an overlying cap while forming conductive material below the channel region within the void; forming a field effect transistor gate over the channel region; and forming source/drain regions operatively proximate the field effect transistor gate. - View Dependent Claims (19, 20, 21, 22, 23)
-
-
24. A method for making a semiconductor memory device comprising a field effect transistor having a floating body region and a gate elevationally over the floating body region and the memory device comprising a bias gate underneath the floating body region, the method comprising depositing conductive material of the bias gate to underneath the floating body region after forming the floating body region.
-
25. A method for making a semiconductor memory device comprising a field effect transistor having a floating body region and a gate elevationally over the floating body region and the memory device comprising a bias gate underneath the floating body region, the method comprising forming the bias gate underneath the floating body region after forming the floating body region and forming the gate that is elevationally over the floating body region after forming the bias gate that is underneath the floating body region.
-
26. A method for making a semiconductor memory device comprising a field effect transistor having a floating body region and a gate elevationally over the floating body region and the memory device comprising a bias gate underneath the floating body region and comprising gate dielectric, the gate dielectric being underneath the bias gate and elevationally over the bias gate between the bias gate and the floating body region, the method comprising forming the gate dielectric that is underneath the bias gate prior to forming the bias gate and prior to forming the gate that is elevationally over the floating body region.
- 27. A method for making a semiconductor memory device comprising a field effect transistor having a floating body region and a gate elevationally over the floating body region and the memory device comprising a bias gate underneath the floating body region and comprising gate dielectric, the date dielectric being underneath the bias gate and elevationally over the bias gate between the bias gate and the floating body region, the method comprising forming the gate dielectric that is elevationally over the bias gate between the bias gate and the floating body region prior to forming the bias gate and prior to forming the gate that is elevationally over the floating body region.
Specification