Altering performance of computational units heterogeneously according to performance sensitivity
First Claim
Patent Images
1. A method for operating a computer system including a plurality of computational units comprising:
- removing one or more of the computational units with low performance sensitivity from a group of the computational units until a predicted power margin of computational units remaining in the group is greater than zero; and
boosting performance of the computational units remaining in the group.
1 Assignment
0 Petitions
Accused Products
Abstract
One or more computational units of a computer system are selectively altered in terms of performance according to which of the one or more computational units has a higher performance sensitivity than others of the computational units.
11 Citations
18 Claims
-
1. A method for operating a computer system including a plurality of computational units comprising:
-
removing one or more of the computational units with low performance sensitivity from a group of the computational units until a predicted power margin of computational units remaining in the group is greater than zero; and boosting performance of the computational units remaining in the group. - View Dependent Claims (2, 3, 4, 5)
-
-
6. A method for operating a computer system including a plurality of processing cores comprising:
if a predicted power margin resulting from boosting performance of a group of the cores is less than zero, removing a core with low performance sensitivity from the group to form a smaller group; and calculating a new predicted power margin and determining if the new predicted power margin is greater than zero if performance of the cores in the smaller group is boosted; if the new predicted power margin is greater than zero for the cores in the smaller group, boosting the performance of the cores in the smaller group; and if the new predicted power margin for the current group is still less than zero, removing another core with low boost sensitivity from the smaller group to form another smaller group. - View Dependent Claims (7, 8)
-
9. A method for operating a computer system including a plurality of processing cores comprising:
-
if a predicted power margin resulting from boosting performance of a group of the processing cores is less than zero, eliminating one or more processing cores from the group, according to performance sensitivity of the one or more processing cores being lower than performance sensitivity of other of the processing cores, until the predicted power margin is greater than zero; and boosting performance of remaining processing cores in the group by increasing at least a frequency of clock signals being supplied to the remaining cores. - View Dependent Claims (10)
-
-
11. An apparatus comprising:
-
a plurality of computational units; a storage to store performance sensitivity information associated with the computational units; and a power allocation function configured to boost performance of one or more of the computational units according to which one or more of the computational units has a higher performance sensitivity, based on the performance sensitivity information, than others of the computational units. - View Dependent Claims (12, 13, 14, 15, 16, 17)
-
-
18. A non-transitory computer readable medium encoding a computer readable description of circuits that include, a plurality of computational units;
-
a storage to store performance sensitivity information associated with the computational units; and a power allocation function configured to alter performance of one or more of the computational units according to which one or more of the computational units has a higher performance sensitivity, according to the performance sensitivity information, than others of the computational units.
-
Specification