Power semiconductor device and method of manufacturing the same

• US 8,450,183 B2
• Filed: 12/07/2010
• Issued: 05/28/2013
• Est. Priority Date: 03/10/2010
• Status: Active Grant

• Current Assignee: Mitsubishi Electric Corporation
• Original Assignee: Mitsubishi Electric Corporation
• Inventors: Fujii, Ryoichi, Honda, Shigeto, Narazaki, Atsushi, Motonami, Kaoru
• Primary Examiner(s): Blum, David S
• Application Number:
  US12/961,905
• Publication Number:
  US 20110220914A1
• Time in Patent Office: 903 Days
• Field of Search: 438/437, 257/77, 257/493, 257/E21.214, 257/E29.166
• US Class Current: 438/437
• CPC Class Codes: H01L 29/0615 by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] LDD or drain offset regions H01L29/7833
• CPC Class Codes: H01L 29/063 Reduced surface field [RESURF] pn-junction structures
• CPC Class Codes: H01L 29/0661 specially adapted for altering the breakdown voltage by removing semiconductor material at, or in the neighbourhood of, a reverse biased junction, e.g. by bevelling, moat etching, depletion etching
• CPC Class Codes: H01L 29/8611 Planar PN junction diodes
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A method of manufacturing a power semiconductor device according to the present invention includes the steps of: (a) forming a silicon nitride film on a semiconductor substrate; (b) after the step (a), forming a ring-shaped trench along a peripheral portion of the semiconductor substrate 6; (c) forming a first silicon oxide film on an inner surface of the trench; (d) after the step (c), forming a second silicon oxide film on an entire surface of the semiconductor substrate to bury the trench; (e) planarizing the second silicon oxide film by using the silicon nitride film as a stopper; and (f) forming a third silicon oxide film in a region in which the silicon nitride film is removed.

Claims

1. A method of manufacturing a power semiconductor device, comprising the steps of:

(a) forming a silicon nitride film on a semiconductor substrate;

(b) after said step (a), forming a ring-shaped trench along a peripheral portion of said semiconductor substrate as a terminal structure of a cell region, and defining the inside of the ring as said cell region;

(c) forming a first silicon oxide film on an inner surface of said trench;

(d) after said step (c), forming a second silicon oxide film on an entire surface of said semiconductor substrate to bury said trench;

(e) planarizing said second silicon oxide film by using said silicon nitride film as a stopper; and

(f) removing said silicon nitride film, and then forming a third silicon oxide film in a region in which said silicon nitride film is removed,

wherein said third silicon oxide film is formed by thermal oxidation.

2. The method of manufacturing a power semiconductor device according to claim 1, wherein

said step (a) is a step of forming said silicon nitride film on an Si substrate or an SiC substrate which serves as said semiconductor substrate.

3. The method of manufacturing a power semiconductor device according to claim 1, wherein

said step (b) is a step of forming, as said trench, a trench region in which a surface of said semiconductor substrate is scattered in the shape of islands.

4. A power semiconductor device comprising:

a semiconductor substrate in which a ring-shaped trench is formed along a peripheral portion of said semiconductor substrate as a terminal structure of a cell region, the inside of the ring being defined as said cell region;

a first silicon oxide film formed on an inner surface of said trench;

a second silicon oxide film formed on said first silicon oxide film and buried in said trench in such a manner that said first silicon oxide film and said second silicon oxide film completely fill said trench; and

a third silicon oxide film formed on a surface of said semiconductor substrate except said trench,

wherein said trench is formed as a trench part in which the surface of said semiconductor substrate is scattered in the shape of islands.

5. The power semiconductor device according to claim 4, wherein

said semiconductor substrate is an Si substrate or an SiC substrate.