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Semiconductor devices including buried gate electrodes

  • US 8,450,786 B2
  • Filed: 09/23/2011
  • Issued: 05/28/2013
  • Est. Priority Date: 09/18/2007
  • Status: Active Grant
First Claim
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1. A semiconductor device comprising:

  • a semiconductor substrate including cell and peripheral regions;

    a cell transistor in the cell region wherein the cell transistor includes a buried gate electrode in a gate trench in the substrate and first and second cell source/drain regions on opposite sides of the gate trench;

    a peripheral transistor in the peripheral region, wherein the peripheral transistor includes a peripheral gate electrode on the substrate in the peripheral region and first and second peripheral source/drain regions in the substrate adjacent opposite sides of the peripheral gate electrode; and

    a bit line electrically coupled to the first cell source/drain region,wherein the bit line and a part of the peripheral gate electrode comprise a same conductive material,wherein an upper surface of the bit line is disposed at substantially a same height above the upper surface of the semiconductor substrate as an upper surface of the peripheral gate electrode.

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