Micromachined ultrasonic transducer having compliant post structure

• US 8,451,693 B2
• Filed: 08/20/2010
• Issued: 05/28/2013
• Est. Priority Date: 08/25/2009
• Status: Active Grant

• Current Assignee: Board of Trustees of the Leland Stanford Junior University (Stanford Management Co.)
• Original Assignee: Board of Trustees of the Leland Stanford Junior University (Stanford Management Co.)
• Inventors: Nikoozadeh, Amin, Khuri-Yakub, Butrus T.
• Primary Examiner(s): Alsomiri, Isam
• Assistant Examiner(s): HULKA, JAMES R
• Application Number:
  US12/806,763
• Publication Number:
  US 20110050033A1
• Time in Patent Office: 1,012 Days
• Field of Search: 367/181, 310/300
• US Class Current: 367/181
• CPC Class Codes: B06B 1/0292 Electrostatic transducers, e.g. electret-type

Abstract

A compression post capacitive micromachined ultrasonic transducer (CMUT) is provided. The compression post CMUT includes a first electrode, a top conductive layer having a pattern of post holes, a moveable mass that includes the first electrode. The compression post CMUT further includes an operating gap disposed between the top surface of the top conductive layer and a bottom surface of the moveable mass, a pattern of compression posts, where a proximal end the compression post is connected perpendicularly to a bottom surface of the moveable mass, where the pattern of compression posts span through the pattern of post holes. The top conductive layer includes the second electrode that is electronically insulated from the first electrode, where the pattern of compression posts compress to provide a restoring force in a direction that is normal to the bottom surface of the moveable mass.

Claims

1. A compression post capacitive micromachined ultrasonic transducer (CMUT), comprising:

a. a first electrode

b. a top conductive layer, wherein said top conductive layer comprises a pattern of post holes there through, wherein said top conductive layer comprises a device layer of a silicon on insulator (SOI) wafer, wherein said post holes terminate at a buried oxide layer in said SOI wafer, wherein said buried oxide layer is disposed on a handle of said SOI;

c. a moveable mass disposed above a top surface of said top conductive layer, wherein said moveable mass comprises said first electrode;

d. an operating gap, wherein said operating gap is disposed between said top surface of said top conductive layer and a bottom surface of said moveable mass;

e. a pattern of compression posts, wherein a proximal end said compression post is connected perpendicularly to a bottom surface of said moveable mass, wherein said pattern of compression posts span through said pattern of post holes; and

f. a second electrode, wherein said top conductive layer comprises said second electrode, wherein said first electrode is electronically insulated from said second electrode, wherein said pattern of compression posts compress on said buried oxide layer without bending to provide a restoring force in a direction that is normal to said bottom surface of said moveable mass.

2. The compression post CMUT of claim 1, wherein said movable mass comprises an electronic circuit, wherein said electronic circuit operates said first electrode, wherein said electronic circuit operates said second electrode, wherein said second electrode is connected to said top conductive layer.

3. The compression post CMUT of claim 1, wherein said top conductive layer comprises i) a transmit electrode, ii) a receive electrode, or i) and ii).

4. The compression post CMUT of claim 3, wherein said transmit electrode comprises a transmit electrode gap between said transmit electrode and said moveable mass, wherein said receive electrode comprises a receive electrode gap between said receive electrode and said moveable mass, wherein said transmit electrode gap is larger than said receive electrode gap.

5. The compression post CMUT of claim 1, wherein an electronically insulating layer is disposed on said bottom surface of said moveable mass, wherein said electronically insulating layer is disposed between said compression post and said movable mass.

6. The compression post CMUT of claim 1, wherein an electronically insulating layer is disposed on a bottom surface of said compression post.

7. The compression post CMUT of claim 1, wherein said compression post has a lower stiffness than said moveable mass, a higher stiffness than said moveable mass, or the same stiffness as said moveable mass.

8. The compression post CMUT of claim 1, wherein said top conductive layer comprises a device layer of a silicon on insulator (SOI) wafer, wherein said SOI comprises a handle layer, an insulating layer and said device layer.

9. The compression post CMUT of claim 8, wherein said handle layer comprises an electronic circuit, wherein said electronic circuit operates said first electrode connected to said movable mass, wherein said electronic circuit operates said second electrode connected to said device layer.

10. The compression post CMUT of claim 8, wherein said device layer comprises an electronic circuit, wherein said electronic circuit operates said first electrode connected to said movable mass, wherein said electronic circuit operates said second electrode connected to said device layer.

11. The compression post CMUT of claim 1, wherein said top conductive layer comprises said second electrode.

12. The compression post CMUT of claim 1, wherein said moveable mass comprises a plate having a pattern of features disposed therein or pattern of features disposed thereon.

13. The compression post CMUT of claim 1, wherein said compression post has a cross-section shape selected from the group consisting of a circle, a circle with varying thickness along the length of said compression post, a ring, an oval, a hollow oval, a polygon, a hollow polygon, a cross, and a rectangle.

14. The compression post CMUT of claim 1 further comprises a comb drive, wherein said comb drive comprises a plate connected normal to said bottom surface of said movable mass, wherein said plate is disposed in a trench formed in said top conductive layer, wherein said plate is separated from said top conductive layer by a plate gap within said trench.

15. The compression post CMUT of claim 1, wherein said top conductive layer comprises a pattern of secondary post holes, wherein a pattern of secondary compression posts are disposed in said secondary post holes.

16. The compression post CMUT of claim 15, wherein said secondary compression posts have a length spanning from a bottom of said secondary post holes to within said operating gap.

17. The compression post CMUT of claim 15, wherein said secondary compression posts have a length spanning from a bottom of said secondary post holes to a moveable mass cavity disposed in a bottom surface of said movable mass.

18. The compression post CMUT of claim 1, wherein said movable mass comprises another said compression post CMUT disposed thereon, or an electronic device disposed thereon or therein.

19. The compression post CMUT of claim 1 further comprises a bottom conductive layer, wherein said bottom conductive layer is electronically insulated from said top conducting layer, wherein said bottom conductive layer comprises an electronic circuit, wherein said electronic circuit operates said first electrode connected to said movable mass, wherein said electronic circuit operates said second electrode connected to said top conductive layer.

20. The compression post CMUT of claim 1, wherein said top conductive layer comprises an electronic circuit, wherein said electronic circuit operates said first electrode connected to said movable mass, wherein said electronic circuit operates said second electrode connected to said top conductive layer.