Time delay estimation

• US 8,452,561 B2
• Filed: 01/31/2011
• Issued: 05/28/2013
• Est. Priority Date: 09/20/2007
• Status: Active Grant

• Current Assignee: Voxis, Inc. (Topcon Corporation)
• Original Assignee: Voxis, Inc. (Topcon Corporation)
• Inventors: Dimsdale, Jerry Samuel, West, Joseph Newhall, Lewis, Andrew Philip, Gill, Thomas Rahjit Singh
• Primary Examiner(s): Nghiem, Michael
• Assistant Examiner(s): SUAREZ, FELIX E
• Application Number:
  US13/017,501
• Publication Number:
  US 20110161031A1
• Time in Patent Office: 848 Days
• Field of Search: 702/89, 702/106, 702/57, 702/79, 702/107, 702/143, 702/176, 702/189, 702/190, 324/326, 342/174
• US Class Current: 702/79
• CPC Class Codes: G01S 17/10 using transmission of interrupted, pulse-modulated waves determination of distance by phase measurements G01S17/32
• CPC Class Codes: G01S 7/4861 Circuits for detection, sampling, integration or read-out
• CPC Class Codes: G01S 7/4865 Time delay measurement, e.g. time-of-flight measurement, time of arrival measurement or determining the exact position of a peak peak detection in noise, signal conditioning G01S7/487
• CPC Class Codes: G01S 7/4868 Controlling received signal intensity or exposure of sensor
• CPC Class Codes: G01S 7/497 Means for monitoring or calibrating
• CPC Class Codes: G04F 10/00 Apparatus for measuring unknown time intervals by electric means

Abstract

A time differential is estimated between a plurality of signals by determining a filter response of a first electrical signal with a first filter array, determining a filter response of a second electrical signal with a second filter array, and determining, based at least on the filter response of the first electrical signal and the filter response of the second electrical signal, a time differential between the first electrical signal and the second electrical signal. A first optical signal is converted into the first electrical signal and a second optical signal is converted into the second electrical signal. The filter response of the first electrical signal and the filter response of the second electrical signal are sampled and the time differential between the first electrical signal and the second electrical signal is determined based at least on the sampled filter response of the first electrical signal and the sampled filter response of the second electrical signal.

Claims

1. A method for calibrating a time delay estimation circuit comprising:

generating a calibration pulse;

determining a filter response of the calibration pulse with a first filter array;

determining a filter response of the calibration pulse with a second filter array;

determining, by a processor, based at least on the filter response of the calibration pulse determined with the first filter array and the filter response of the calibration pulse determined with the second filter array, a phase correction;

amplifying the calibration pulse;

determining a filter response of the amplified calibration pulse with a third filter array; and

selecting either the filter response of the calibration signal or the filter response of the amplified calibration signal as the filter response of the calibration pulse determined with the second filter array for determining the phase correction.

2. The method of claim 1 further comprising:

sampling the filter response of the calibration pulse determined with the first filter array;

sampling the filter response of the calibration pulse determined with the second filter array; and

wherein the phase correction is determined based at least on the sampled filter response of the calibration pulse determined with the first filter array and the sampled filter response of the calibration pulse determined with the second filter array.

3. An apparatus for calibrating a time delay estimation circuit comprising:

a calibration pulse generator;

a first filter array adapted to determine a filter response of a calibration pulse;

a second filter array adapted to determine a filter response of the calibration pulse;

a processor adapted to determine, based at least on the filter response of the calibration pulse determined with the first filter array and the filter response of the calibration pulse determined with the second filter array, a phase correction;

an amplifier adapted to amplify the calibration pulse;

a third filter array adapted to determine a filter response of the amplified calibration pulse; and

a switch adapted to select either the filter response of the calibration signal or the filter response of the amplified calibration signal as the filter response of the calibration pulse determined with the second filter array for determining the phase correction.

4. The apparatus of claim 3 further comprising:

a first sampler adapted to sample the filter response of the calibration pulse determined with the first filter array;

a second sampler adapted to sample sampling the filter response of the calibration pulse determined with the second filter array; and

wherein the processor is further adapted to determine the phase correction based at least on the sampled filter response of the calibration pulse determined with the first filter array and the sampled filter response of the calibration pulse determined with the second filter array.