TSVs with different sizes in interposers for bonding dies

• US 8,455,995 B2
• Filed: 04/16/2010
• Issued: 06/04/2013
• Est. Priority Date: 04/16/2010
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Lin, Jing-Cheng, Yu, Chen-Hua, Tsai, Po-Hao
• Primary Examiner(s): Warren, Matthew E
• Application Number:
  US12/762,085
• Publication Number:
  US 20110254160A1
• Time in Patent Office: 1,145 Days
• Field of Search: 257/698, 257/737, 257/774, 257/775, 257/777, 257/778, 257/E23.011, 257/E23.062, 257/E23.063, 257/E23.067, 257/E23.145, 257/E23.169, 257/E23.174
• US Class Current: 257/698
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 21/6836 Wafer tapes, e.g. grinding or dicing support tapes adhesive tapes in general C09J7/20
• CPC Class Codes: H01L 21/76898 formed through a semiconductor substrate
• CPC Class Codes: H01L 2221/68327 used during dicing or grinding
• CPC Class Codes: H01L 2221/68381 Details of chemical or physical process used for separating the auxiliary support from a device or wafer
• CPC Class Codes: H01L 2224/13124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/13139 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/13144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/13147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/13155 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/13184 Tungsten [W] as principal constituent
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 2224/16235 the bump connector connecting to a via metallisation of the item
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/81411 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/81444 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/81455 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/81464 : Palladium [Pd] as principal constituent
• CPC Class Codes: H01L 2224/81805 : involving forming a eutectic alloy at the bonding interface
• CPC Class Codes: H01L 2225/06517 : Bump or bump-like direct electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06548 : Conductive via connections through the substrate, container, or encapsulation
• CPC Class Codes: H01L 23/13 : characterised by the shape
• CPC Class Codes: H01L 23/147 : Semiconductor insulating substrates semiconductor conductive substrates H01L23/4926
• CPC Class Codes: H01L 23/3121 : a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/481 : Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 23/49822 : Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/49827 : Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 24/13 : of an individual bump connector
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 25/0652 : the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 25/0655 : the devices being arranged next to each other
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00011 : Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/15192 : Resurf arrangement of the internal vias
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15321 : being a ball array, e.g. BGA

Abstract

A device includes an interposer including a substrate having a top surface and a bottom surface. A plurality of through-substrate vias (TSVs) penetrates through the substrate. The plurality of TSVs includes a first TSV having a first length and a first horizontal dimension, and a second TSV having a second length different from the first length, and a second horizontal dimension different from the first horizontal dimension. An interconnect structure is formed overlying the top surface of the substrate and electrically coupled to the plurality of TSVs.

Claims

1. A device comprising:

an interposer comprising a substrate having a top surface and a bottom surface, wherein the interposer is substantially free from integrated circuit devices formed therein;

a plurality of through-substrate vias (TSVs) penetrating through the substrate, wherein the plurality of TSVs comprises a first TSV having a first length and a first horizontal dimension, and a second TSV having a second length different from the first length, and a second horizontal dimension different from the first horizontal dimension; and

a first interconnect structure formed overlying the top surface of the substrate and electrically coupled to the plurality of TSVs.

2. The device of claim 1, wherein the first horizontal dimension is greater than the second horizontal dimension of the second TSV.

3. The device of claim 2, wherein a ratio of the first horizontal dimension to the second horizontal dimension is greater than about 1.5.

4. The device of claim 1, wherein the first length is greater than the second length.

5. The device of claim 1 further comprising:

a first die overlying the first interconnect structure; and

a second die underlying the bottom surface of the substrate and electrically coupled to the second TSV.

6. The device of claim 5, wherein the second die is bonded to the second TSV.

7. The device of claim 5 further comprising a molding compound underlying the bottom surface of the substrate, wherein the first TSV extends to penetrate the molding compound.

8. The device of claim 7, wherein the second die is formed in the molding compound.

9. The device of claim 8 further comprising a metal bump on a bottom surface of the molding compound and electrically coupled to the first TSV.

10. The device of claim 7 further comprising a second interconnect structure underlying the molding compound and electrically connected to the first TSV.

11. The device of claim 10 further comprising a metal bump underlying the second interconnect structure and electrically coupled to the first TSV.

12. The device of claim 5, wherein the substrate comprises a recess extending from the bottom surface of the substrate into the substrate, and wherein at least a portion of the second die is located in the recess.

13. The device of claim 1, wherein the substrate comprises a semiconductor substrate, and wherein the interposer is substantially free from active devices therein.

14. The device of claim 13, wherein the substrate comprises a silicon substrate.

15. A device comprising:

an interposer comprising a substrate having a top surface and a bottom surface;

a plurality of through-substrate vias (TSVs) penetrating through the substrate, wherein the plurality of TSVs comprises a first TSV having a first length and a first horizontal dimension, and a second TSV having a second length different from the first length, and a second horizontal dimension different from the first horizontal dimension;

a molding compound underlying the bottom surface of the substrate, wherein the first TSV extends to penetrate the molding compound;

a first interconnect structure formed overlying the top surface of the substrate and electrically coupled to the plurality of TSVs;

a first die overlying the first interconnect structure; and

a second die underlying the bottom surface of the substrate and electrically coupled to the second TSV.

16. The device of claim 15, wherein the second die is formed in the molding compound.

17. The device of claim 15 further comprising a metal bump on a bottom surface of the molding compound and electrically coupled to the first TSV.

18. The device of claim 15 further comprising a second interconnect structure underlying the molding compound and electrically connected to the first TSV.

19. A device comprising:

a interposer comprising a substrate having a top surface and a bottom surface, wherein the substrate comprises a recess extending from the bottom surface of the substrate into the substrate;

a plurality of through-substrate vias (TSVs) penetrating through the substrate, wherein the plurality of TSVs comprises a first TSV having a first length and a first horizontal dimension, and a second TSV having a second length different from the first length, and a second horizontal dimension different from the first horizontal dimension;

a first interconnect structure formed overlying the top surface of the substrate and electrically coupled to the plurality of TSVs;

a first die overlying the first interconnect structure; and

a second die underlying the bottom surface of the substrate and electrically coupled to the second TSV, wherein at least a portion of the second die is located in the recess.

20. The device of claim 19 further comprising a molding compound underlying the bottom surface of the substrate, wherein the first TSV extends to penetrate the molding compound, wherein the second die is disposed in the molding compound.