Controllable storage elements for an IC

• US 8,456,190 B2
• Filed: 03/16/2011
• Issued: 06/04/2013
• Est. Priority Date: 09/17/2008
• Status: Active Grant

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Tabula Incorporated
• Inventors: Redgrave, Jason, Voogel, Martin, Teig, Steven
• Primary Examiner(s): Richardson, Jany
• Application Number:
  US13/049,887
• Publication Number:
  US 20110221471A1
• Time in Patent Office: 811 Days
• Field of Search: 326 37- 41, 326/47
• US Class Current: 326/38
• CPC Class Codes: H03K 19/173 using elementary logic circuits as components
• CPC Class Codes: H03K 19/17736 Structural details of routing resources
• CPC Class Codes: H03K 19/1776 for memories

Abstract

An integrated circuit (“IC”) that includes a configurable routing fabric with controllable storage elements is described. The routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric may provide the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component may continually perform operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the IC.

Claims

1. An electronic device comprising:

a memory for storing sets of configuration data; and

an integrated circuit (“

IC”

) comprising;

a) a plurality of configurable logic circuits for configurably performing logic operations;

b) a plurality of configurable interconnect circuits for configurably passing signals to and from said logic circuits;

c) a plurality of configurable storage circuits, each of the plurality of configurable storage circuits comprising;

i) a configurable interconnect circuit for configurably passing signals to and from circuits of the IC; and

ii) a plurality of clocked delay elements connected serially with an output of each delay element, except the last delay element, connected to an input of a subsequent delay element in the plurality of clocked delay elements,

wherein the outputs of at least two delay elements further connect to at least two inputs of the configurable interconnect circuit.

2. The electronic device of claim 1, wherein each of the plurality of configurable storage circuits comprises at least one input and at least one output.

3. The electronic device of claim 2, wherein during each particular clock cycle, each configurable storage circuit (i) stores a first signal provided at said input of the configurable storage circuit and (ii) supplies, at said output of the configurable storage circuit, a second signal stored during a previous clock cycle that occurs a plurality of clock cycles prior to the particular clock cycle.

4. The electronic device of claim 3, wherein the previous clock cycle occurs two clock cycles prior to the particular clock cycle.

5. The electronic device of claim 3, wherein the previous clock cycle occurs four clock cycles prior to the particular clock cycle.

6. The electronic device of claim 1, where the configurable interconnect circuit comprises a set of inputs, a set of select lines, and at least one output, wherein the configurable interconnect circuit selects an input from the set of inputs based on data supplied to the set of select lines.

7. The electronic device of claim 6, wherein the configurable interconnect circuit selects an input from the set of inputs based on a configuration data supplied to the set of select lines.

8. The electronic device of claim 6, wherein the configurable interconnect circuit selects an input from the set of inputs based on a user design data supplied to the set of select lines.

9. The electronic device of claim 6, wherein the configurable interconnect circuit is a hybrid interconnect circuit that selects an input from the set of inputs based on at least one of a configuration data and a user design data supplied to the set of select lines.

10. An integrated circuit (“

IC”

) comprising;

a) a plurality of configurable logic circuits for configurably performing logic operations;

b) a plurality of configurable interconnect circuits for configurably passing signals to and from said logic circuits;

c) a plurality of controllable storage circuits, each controllable storage circuit comprising;

i) a controllable interconnect circuit for controllably passing signals to and from circuits of the IC; and

ii) a plurality of clocked delay elements connected serially with an output of each but the last delay element connected to an input of a subsequent delay element in the plurality of clocked delay elements,

wherein an output of each of at least two delay elements further connects to each of at least two inputs of the controllable interconnect circuit.

11. The IC of claim 10, wherein the controllable interconnect circuit comprises a set of inputs, a set of select lines, and at least one output, wherein the controllable interconnect circuit selects an input from the set of inputs based on data supplied to the set of select lines.

12. The IC of claim 11, wherein the controllable interconnect circuit is a configurable interconnect circuit that selects an input from the set of inputs based on a configuration data supplied to the set of select lines.

13. The IC of claim 11, wherein the controllable interconnect circuit selects an input from the set of inputs based on a user design data supplied to the set of select lines.

14. The IC of claim 11, wherein the controllable interconnect circuit is a hybrid interconnect circuit that selects an input from the set of inputs based on at least one of a configuration data and a user design data supplied to the set of select lines.

15. The IC of claim 10 further comprising a configurable routing fabric that is formed at least partially by a set of the plurality of configurable interconnect circuits and a set of the plurality of controllable storage circuits.

16. The IC of claim 10, wherein an input of the controllable storage circuit is connected to an input of the first delay element in the plurality of clocked delay elements and an output of the controllable storage circuit is connected to an output of the controllable interconnect circuit.

17. The IC of claim 10, wherein:

the plurality of clocked delay elements comprises four clocked delay elements,

an output of the second clocked delay element in the four clocked delay elements is connected to a first input of the controllable interconnect circuit, and

an output of the fourth clocked delay element in the four clocked delay elements is connected to a second input of the controllable interconnect circuit.

18. An integrated circuit (“

IC”

) comprising a plurality of configurable clocked storage elements, each configurable clocked storage element comprising a set of clocked delay elements connected sequentially, each clocked delay element storing a signal and comprising at least one input and at least one output,

wherein, during each particular clock cycle, the configurable clocked storage element receives a configuration data signal, wherein, when the configuration data signal has a first value during the particular clock cycle, each clocked delay element in the set of sequentially connected clocked delay elements keeps its stored signal, wherein, when the configuration data signal has a second value during the particular clock cycle, each clocked delay element in the set of sequentially connected clocked delay elements replaces its stored signal with another signal received at its input.

19. The IC of claim 18 further comprising:

a) a plurality of configurable logic circuits for configurably performing logic operations; and

b) a plurality of configurable interconnect circuits for configurably passing signals to and from said configurable logic circuits, wherein a set of the plurality of configurable interconnect circuits receive signals stored in the plurality of configurable clocked storage elements.

20. The IC of claim 19, wherein:

the configurable logic circuits are reconfigurable logic circuits,

the configurable interconnect circuits are reconfigurable interconnect circuits,

the configurable clocked storage elements are reconfigurable clocked storage elements, and

each particular clock cycle is a reconfiguration cycle.