Solid-state imaging device

• US 8,456,540 B2
• Filed: 08/03/2010
• Issued: 06/04/2013
• Est. Priority Date: 10/26/2009
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Egawa, Yoshitaka
• Primary Examiner(s): OSINSKI, MICHAEL S
• Application Number:
  US12/849,345
• Publication Number:
  US 20110096193A1
• Time in Patent Office: 1,036 Days
• Field of Search: 250/208.1, 348/207.99, 348/222.1, 3482261-2301, 348/241, 348248-249, 348294-324
• US Class Current: 348/226.1
• CPC Class Codes: H04N 23/70 Circuitry for compensating brightness variation in the scene
• CPC Class Codes: H04N 23/745 Detection of flicker frequency or suppression of flicker wherein the flicker is caused by illumination, e.g. due to fluorescent tube illumination or pulsed LED illumination

Abstract

According to one embodiment, a solid-state imaging device includes a pixel unit, a flicker detecting unit, a flicker-level estimating unit, and a flicker correcting unit. The flicker detecting unit detects, based on a magnitude relation of a signal amount in each of lines formed in the pixel unit, presence or absence of a flicker. The flicker-level estimating unit estimates a flicker level in each of the lines of the next frame. The flicker correcting unit corrects, for each of the lines, a flicker that occurs in a signal of an image picked up by the pixel unit.

Claims

1. A solid-state imaging device comprising:

a pixel unit in which pixels are arranged in a matrix shape;

a flicker detecting unit that detects, based on a magnitude relation of a signal amount in each of lines formed in the pixel unit with respect to an image signal of one frame picked up by the pixel unit, presence or absence of a flicker;

a flicker-level estimating unit that estimates, based on the presence or absence of the flicker detected by the flicker detecting unit, a flicker level in each of the lines of a next frame; and

a flicker correcting unit that corrects, based on the flicker level estimated by the flicker-level estimating unit, for each of the lines, a flicker that occurs in a signal of an image picked up by the pixel unit, wherein

the flicker detecting unit includes;

a flicker-level detecting unit that detects, based on a minimum and a maximum of a signal amount for each of the lines, a flicker level;

a flicker-period detecting unit that detects, based on an interval between lines in a position where the signal amount for each of the lines is minimum and a position where the signal amount is maximum, a flicker period; and

a flicker-phase calculating unit that calculates, based on an interval from a predetermined position of the flicker signal detected by the flicker-period detection to a next frame, a flicker phase.

2. The solid-state imaging device according to claim 1, wherein the flicker-level estimating unit estimates, based on the flicker period, the flicker level, and the time to the readout line of the next frame, a flicker correction gain of the lines of the next frame.

3. The solid-state imaging device according to claim 1, wherein the flicker detecting unit determines, based on a result of determination whether the interval between the lines in the position where the signal amount for each of the lines is minimum and the position where the signal amount is maximum corresponds to an assumed flicker period, presence or absence of a flicker.

4. The solid-state imaging device according to claim 1, wherein the flicker correcting unit includes a gain control unit that controls, based on the flicker level estimated by the flicker-level estimating unit, for each of the lines, a gain of a signal read out from the pixels.

8. The solid-state imaging device according to claim 1, wherein the flicker correcting unit includes an accumulation-time calculating unit that calculates, based on the flicker level estimated by the flicker-level estimating unit, for each of the lines, accumulation time for the pixels.

9. The solid-state imaging device according to claim 8, further comprising an electronic shutter scanning control circuit that controls, based on an accumulation time control signal calculated from the accumulation time calculating unit, generation of an accumulation start signal.

10. The solid-state imaging device according to claim 9, further comprising a pulse selector that generates, based on the accumulation start signal, a readout signal, a reset signal, and a row selection signal and outputs the readout signal, the reset signal, and the row selection signal to the pixels.

11. The solid-state imaging device according to claim 10, wherein the pixel unit includes:

a photodiode that performs photoelectric conversion;

a row selection transistor that performs, based on the row selection signal, row selection;

a reset transistor that resets, based on the reset signal, a signal accumulated in a detection node;

a readout transistor that reads out, based on the readout signal, a signal from the photodiode to the detection node; and

an amplification transistor that amplifies the signal read out from the photodiode to the detection node.

5. A solid-state imaging device comprising:

a pixel unit in which pixels are arranged in a matrix shape;

a flicker detecting unit that detects, based on a magnitude relation of a signal amount in each of lines formed in the pixel unit with respect to an image signal of one frame picked up by the pixel unit, presence or absence of a flicker;

a flicker-level estimating unit that estimates, based on the presence or absence of the flicker detected by the flicker detecting unit, a flicker level in each of the lines of a next frame; and

a flicker correcting unit that corrects, based on the flicker level estimated by the flicker-level estimating unit, for each of the lines, a flicker that occurs in a signal of an image picked up by the pixel unit,

a lens-shading correcting unit that corrects lens shading,

an adder that adds up flicker level calculated by the flicker-level estimating unit and a shading correction coefficient output from the lens-shading correcting unit,

wherein the flicker correcting unit includes a gain control unit that controls, based on the flicker level estimated by the flicker-level estimating unit, for each of the lines, a gain of a signal read out from the pixels.

6. The solid-state imaging device according to claim 5, further comprising a multiplier that multiplies, for each of the lines an image signal picked up by the pixel unit with an output of the adder.

7. The solid-state imaging device according to claim 6, further comprising a column ADC circuit that performs CDS processing and AD conversion processing for the image signal read out from the pixel unit.