High speed processing of financial information using FPGA devices

• US 8,458,081 B2
• Filed: 03/31/2011
• Issued: 06/04/2013
• Est. Priority Date: 06/19/2006
• Status: Active Grant

• Current Assignee: Exegy Incorporated
• Original Assignee: Exegy Incorporated
• Inventors: Parsons, Scott, Taylor, David E., Schuehler, David Vincent, Franklin, Mark A., Chamberlain, Roger D.
• Primary Examiner(s): Borlinghaus, Jason M
• Application Number:
  US13/077,224
• Publication Number:
  US 20110178912A1
• Time in Patent Office: 796 Days
• Field of Search: None
• US Class Current: 705/37
• CPC Class Codes: G06Q 40/00 Finance; Insurance; Tax strategies; Processing of corporate or income taxes
• CPC Class Codes: G06Q 40/04 Trading; Exchange, e.g. stocks, commodities, derivatives or currency exchange
• CPC Class Codes: G06Q 40/06 Asset management; Financial planning or analysis

Abstract

A high speed apparatus and method for processing a plurality of financial market data messages are disclosed. With respect to an exemplary embodiment, a reconfigurable logic device is employed to (1) receive the financial market data messages, and (2) process each received financial market data message to update a stored record for the financial instrument associated with that message.

Claims

1. An apparatus for processing a plurality of financial market data messages, each financial market data message comprising financial market data and being associated with a financial instrument, the apparatus comprising:

a reconfigurable logic device comprising a plurality of pipelined data processing blocks implemented in firmware logic on the reconfigurable logic device, the pipelined data processing blocks comprising a first data processing block and a second data processing block downstream from the first data processing block;

wherein the first data processing block is configured to retrieve pointer data from a memory in response to a plurality of received financial market data messages, the retrieved pointer data being configured to point to a plurality of records that are associated with the financial instruments that are associated with the received financial market data messages; and

wherein the second data processing block is configured to retrieve a plurality of financial instrument records from a memory based on the retrieved pointer data, the retrieved financial instrument records being associated with the financial instruments that are associated with the received financial market data messages; and

wherein the first and second data processing blocks are configured to operate simultaneously with respect to each other in a pipelined fashion.

4. The apparatus of claim 1 wherein the pipelined data processing blocks further comprise a third data processing block downstream from the second data processing block, the third data processing block configured to process the financial market data of the received financial market data messages to generate a plurality of updates for the retrieved financial instrument records, and wherein the first, second, and third data processing blocks are configured to operate simultaneously with respect to each other in the pipelined fashion.

5. The apparatus of claim 4 wherein the pipelined data processing blocks further comprise a fourth data processing block downstream from the third data processing block, the fourth data processing block configured to write the generated updates to memory, and wherein the first, second, third, and fourth data processing blocks are configured to operate simultaneously with respect to each other in the pipelined fashion.

6. The apparatus of claim 5 wherein the reconfigurable logic device comprises a field programmable gate array (FPGA), and wherein the first data processing block, the second data processing block, the third data processing block, and the fourth data processing block are configured to perform their respective operations at hardware processing speeds.

7. The apparatus of claim 4 further comprising a record management memory and a record storage memory, the record management memory configured to store a plurality of pointer records indexed by a plurality of financial instrument identifiers, the pointer records configured to store the pointer data, the record storage memory configured to store the financial instrument records, wherein the financial market data messages further comprise a plurality of financial instrument identifiers;

wherein the first data processing block is further configured to retrieve pointer records from the record management memory based on the financial instrument identifiers in the received financial market data messages; and

wherein the second data processing block is configured to retrieve financial instrument records from the record storage memory based on pointer data in the retrieved pointer records.

8. The apparatus of claim 7 wherein the financial market data messages further comprise a plurality of exchange identifiers, wherein the record storage memory is further configured to store a plurality of regional financial instrument records, a plurality of composite financial instrument records, and a plurality of regional list financial instrument records, the regional list financial instrument records configured to store a plurality of regional financial instrument record pointers;

wherein the pointer records comprise composite financial instrument record pointers and a plurality of regional list financial instrument record pointers;

wherein the first data processing block is further configured to (1) retrieve regional list financial instrument records from the record storage memory based on the regional list financial instrument record pointers in the retrieved pointer records, and (2) determine a regional financial instrument record pointer from the retrieved regional list financial instrument record based on the exchanged identifiers in the financial market data messages; and

wherein the second data processing block is further configured to (1) retrieve a plurality of composite financial instrument records based on the composite financial instrument record pointers in the retrieved pointer records, and (2) retrieve a plurality of regional financial instrument records based on the determined regional financial instrument record pointers.

9. The apparatus of claim 8 wherein the third data processing block comprises a plurality of regional update engines and a plurality of composite update engines that are configured to generate updates for the retrieved regional financial instrument records and the retrieved composite financial instrument records respectively in parallel with each other.

10. The apparatus of claim 8 wherein the record storage memory is external to the reconfigurable logic device.

11. The apparatus of claim 10 wherein the record management memory is external to the reconfigurable logic device.

12. The apparatus of claim 10 wherein the record management memory is internal to the reconfigurable logic device.

13. The apparatus of claim 8 wherein the record storage memory is internal to the reconfigurable logic device.

14. The apparatus of claim 7 wherein the record management memory is external to the reconfigurable logic device.

15. The apparatus of claim 7 wherein the record management memory is internal to the reconfigurable logic device.

16. The apparatus of claim 7 wherein the reconfigurable logic device comprises a field programmable gate array (FPGA), and wherein the first data processing block, the second data processing block, and the third data processing block are configured to perform their respective operations at hardware processing speeds.

17. The apparatus of claim 4 wherein the reconfigurable logic device comprises a field programmable gate array (FPGA), and wherein the first data processing block, the second data processing block, and the third data processing block are configured to perform their respective operations at hardware processing speeds.

18. The apparatus of claim 1 wherein the reconfigurable logic device comprises a field programmable gate array (FPGA), and wherein the first data processing block and the second data processing block are configured to perform their respective operations at hardware processing speeds.

2. A method for processing financial market data, the method comprising:

receiving streaming data, the streaming data comprising a plurality of data fields, a plurality of financial instrument identifiers, and a plurality of exchange identifiers, each data field comprising financial market data for a financial instrument and being associated with a financial instrument identifier and an exchange identifier;

processing the streaming data through a pipeline deployed in firmware logic on a reconfigurable logic device, the pipeline comprising a first data processing block, a second data processing block downstream from the first data processing block, and a third data processing block downstream from the second data processing block, wherein the processing step comprises;

the first data processing block resolving the streaming data to a plurality of memory addresses based on the financial instrument identifiers and exchange identifiers in the streaming data;

the second data processing block retrieving a plurality of composite financial instrument records and a plurality of regional financial instrument records from a memory based on the resolved memory addresses; and

the third data processing block performing at least one financial data processing operation on the data fields in the streaming data to generate a plurality of updates for the retrieved composite financial instrument records and the retrieved regional financial instrument records; and

the first data processing block, the second data processing block, and the third data processing block operating simultaneously with respect to each other in a pipelined fashion as the streaming data is processed through the pipeline.

34. The method of claim 2 wherein the reconfigurable logic device comprises a field programmable gate array (FPGA);

the first, second, and third data processing blocks performing their respective operations at hardware processing speeds.

35. The method of claim 34 further comprising:

a record storage memory storing the composite and regional financial instrument records in a plurality of memory addresses; and

caching updated composite and regional financial instrument records in a cache memory;

wherein the pipeline further comprises a cache determination block downstream from the first data processing block and upstream from the second data processing block, and wherein the processing step further comprises;

the cache determination block (1) receiving the resolved memory addresses from the first data processing block, and (2) determining whether a cached record or a record from the record storage memory should be retrieved for a resolved memory address; and

wherein the first data processing block, the cache determination block, the second data processing block, and the third data processing block are operating simultaneously with respect to each other at hardware processing speeds in the pipelined fashion as the streaming data is processed through the pipeline.

36. The method of claim 34 wherein the third data processing block comprises a plurality of regional update engines and a plurality of composite update engines in parallel, and wherein the step of performing the at least one data processing operation comprises:

the regional update engines processing the message fields and the retrieved regional financial instrument records to generate a plurality of regional updates; and

the composite update engines processing the message fields and the retrieved composite financial instrument records to generate a plurality of composite updates; and

wherein at least a plurality of the regional update engines and at least a plurality of the composite update engines are operating in parallel with respect to each other at hardware processing speeds.

37. The method of claim 34 further comprising:

a record storage memory storing the composite and regional financial instrument records in a plurality of memory addresses; and

a record management memory storing a plurality of pointers to memory addresses for a plurality of the records in the record storage memory, the pointers being indexed by financial instrument identifiers; and

wherein the resolving step comprises the first data processing block retrieving pointers from the record management memory based on the financial instrument identifiers in the streaming data.

38. The method of claim 37 further comprising:

the record storage memory storing a plurality of regional list financial instrument records, each regional list financial instrument record being associated with a financial instrument and comprising a plurality of regional pointers to memory addresses for a plurality of regional financial instrument records in the record storage memory, the regional pointers being indexed by exchange identifiers;

wherein the pointers in the record management memory comprise pointers to memory addresses for a plurality of composite financial instrument records in the record storage memory and pointers to memory addresses for a plurality of regional list financial instrument records in the record storage memory; and

wherein the resolving step further comprises the first data processing block (1) retrieving the pointers for the composite financial instrument records and the pointers for the regional list financial instrument records based on the financial identifiers in the streaming data, (2) retrieving regional list financial instrument records from the record storage memory based on the retrieved pointers for the regional list financial instrument records, and (3) identifying pointers to regional financial instrument records based on the exchange identifiers in the streaming data.

3. A method for processing a plurality of financial market data messages, each financial market data message comprising financial market data and being associated with a financial instrument, the method comprising:

receiving the financial market data messages; and

processing a plurality of the received financial market data messages

through a pipeline deployed in firmware logic on a reconfigurable logic device, the pipeline comprising a first data processing block and a second data processing block that is downstream from the first data processing block, the processing step comprising;

the first data processing block retrieving pointer data from a memory in response to the processed financial market data messages, the retrieved pointer data pointing to a plurality of records that are associated with the financial instruments that are associated with the processed financial market data messages; and

the second data processing block retrieving a plurality of financial instrument records from a memory based on the retrieved pointer data, the retrieved financial instrument records being associated with the financial instruments that are associated with the received financial market data messages; and

the first and second data processing blocks operating simultaneously with respect to each other in a pipelined fashion.

19. The method of claim 3 wherein the pipeline further comprises a third data processing block downstream from the second data processing block, and wherein the processing step further comprises the third data processing block processing the financial market data of the financial market data messages to generate a plurality of updates for the retrieved financial instrument records, and wherein the first, second, and third data processing blocks are operating simultaneously with respect to each other in the pipelined fashion.

20. The method of claim 19 wherein the pipeline further comprise a fourth data processing block downstream from the third data processing block, wherein the processing step further comprises the fourth data processing block writing the generated updates to memory, and wherein the first, second, third, and fourth data processing blocks are operating simultaneously with respect to each other in the pipelined fashion.

21. The method of claim 20 wherein the reconfigurable logic device comprises a field programmable gate array (FPGA);

the first data processing block, the second data processing block, the third data processing block, and the fourth data processing block performing their respective operations at hardware processing speeds.

22. The method of claim 19 wherein the financial market data messages further comprise a plurality of financial instrument identifiers, the method further comprising:

a record management memory storing a plurality of pointer records indexed by a plurality of financial instrument identifiers, the pointer records configured to store the pointer data; and

the record storage memory storing the financial instrument records; and

wherein the processing step further comprises;

the first data processing block retrieving pointer records from the record management memory based on the financial instrument identifiers in the received financial market data messages; and

the second data processing block retrieving financial instrument records from the record storage memory based on pointer data in the retrieved pointer records.

23. The method of claim 22 wherein the financial market data messages further comprise a plurality of exchange identifiers, the method further comprising:

the record storage memory storing a plurality of regional financial instrument records, a plurality of composite financial instrument records, and a plurality of regional list financial instrument records, the regional list financial instrument records storing a plurality of regional financial instrument record pointers;

wherein the pointer records comprise composite financial instrument record pointers and a plurality of regional list financial instrument record pointers; and

wherein the processing step further comprises;

the first data processing block (1) retrieving regional list financial instrument records from the record storage memory based on the regional list financial instrument record pointers in the retrieved pointer records, and (2) determining a regional financial instrument record pointer from the retrieved regional list financial instrument record based on the exchanged identifiers in the financial market data messages; and

the second data processing block (1) retrieving a plurality of composite financial instrument records based on the composite financial instrument record pointers in the retrieved pointer records, and (2) retrieving a plurality of regional financial instrument records based on the determined regional financial instrument record pointers.

24. The method of claim 23 wherein the third data processing block comprises a plurality of regional update engines and a plurality of composite update engines, and wherein the processing step further comprises:

the regional update engines and the composite update engines generating updates for the retrieved regional financial instrument records and the retrieved composite financial instrument records respectively in parallel with each other.

25. The method of claim 22 wherein the record storage memory is external to the reconfigurable logic device.

26. The method of claim 25 wherein the record management memory is external to the reconfigurable logic device.

27. The method of claim 25 wherein the record management memory is internal to the reconfigurable logic device.

28. The method of claim 22 wherein the record storage memory is internal to the reconfigurable logic device.

29. The method of claim 22 wherein the record management memory is external to the reconfigurable logic device.

30. The method of claim 22 wherein the record management memory is internal to the reconfigurable logic device.

31. The method of claim 23 wherein the reconfigurable logic device comprises a field programmable gate array (FPGA);

the first data processing block, the second data processing block, and the third data processing block performing their respective operations at hardware processing speeds.

32. The method of claim 19 wherein the reconfigurable logic device comprises a field programmable gate array (FPGA);

the first data processing block, the second data processing block, and the third data processing block performing their respective operations at hardware processing speeds.

33. The method of claim 3 wherein the reconfigurable logic device comprises a field programmable gate array (FPGA);

the first data processing block and the second data processing block performing their respective operations at hardware processing speeds.