Digest generation from instruction op-codes
First Claim
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1. A computer-implemented method, comprising:
- setting a digest value to an initial value; and
updating, by a processor, the digest value based on a sequence of hash operations on values of, at least, a set op-codes of multiple instructions of a program during execution of the multiple instructions of the program by the processor, wherein the sequence of the hash operations is based on an order of actual execution of the multiple instructions of the program by the processor;
wherein a digest value associated with a first order of execution of the multiple instructions is a different value than a digest value associated with a second, different, order of execution of the multiple instructions;
wherein the multiple instructions include at least one conditional instruction; and
wherein the digest value based on the sequence of the hash operations is updated for each of the multiple instructions as each respective instruction of the multiple instructions undergoes an execution process of the processor.
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Abstract
In general, in one aspect, a computer-implemented method includes determining a digest value based on hash operations on values of, at least, a set op-codes of multiple instructions of a program during execution of the program by a processor.
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Citations
26 Claims
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1. A computer-implemented method, comprising:
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setting a digest value to an initial value; and updating, by a processor, the digest value based on a sequence of hash operations on values of, at least, a set op-codes of multiple instructions of a program during execution of the multiple instructions of the program by the processor, wherein the sequence of the hash operations is based on an order of actual execution of the multiple instructions of the program by the processor; wherein a digest value associated with a first order of execution of the multiple instructions is a different value than a digest value associated with a second, different, order of execution of the multiple instructions; wherein the multiple instructions include at least one conditional instruction; and wherein the digest value based on the sequence of the hash operations is updated for each of the multiple instructions as each respective instruction of the multiple instructions undergoes an execution process of the processor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. An apparatus to execute program instructions, the apparatus comprising:
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a circuitry configured to access instructions of a program and determine a digest value based on a sequence of hash operations on values of, at least, a set op-codes of multiple instructions of a program during execution of the multiple instructions of the program by a processor, wherein the sequence of the hash operations is based on an order of actual execution of the multiple instructions of the program by the processor; wherein a digest value associated with a first order of execution of the multiple instructions is a different value than a digest value associated with a second, different, order of execution of the multiple instructions; wherein the multiple instructions may include at least one conditional instruction; and wherein the digest value based on the sequence of the hash operations is updated for each of the multiple instructions as each respective instruction of the multiple instructions undergoes an execution process of the processor. - View Dependent Claims (11, 12, 13, 14, 15)
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16. A computer-implemented method, comprising:
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accessing, by a processor, a value based on a sequence of hash operations on values of, at least, a set op-codes of multiple instructions of a program during execution of the multiple instructions of the program by a second processor, wherein the sequence of the hash operations is based on an order of actual execution of the multiple instructions by the second processor; and performing an operation based on the accessed value and an expected value, wherein a digest value associated with a first order of execution of the multiple instructions is a different value than a digest value associated with a second, different, order of execution of the multiple instructions; wherein the multiple instructions include at least one conditional instruction; and wherein the accessed value reflects an update for each of the multiple instructions as each respective instruction of the multiple instructions underwent an execution process of the second processor. - View Dependent Claims (17, 18, 19)
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20. An apparatus comprises:
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a circuitry configured to; access, at least, an op-code of a first instruction of a program currently loaded in an execution pipeline of a processor; update a digest value based at least in part on at least one first hash operation based on, at least, the accessed op-code of the first instruction; access, at least, an op-code of a second instruction of the program currently loaded in the execution pipeline of the processor; and update the digest value based at least in part on at least one second hash operation based on, at least, the accessed op-code of the second instruction, wherein an order of the first and second hash operations is based on an order of actual execution of the first and the second instructions of the program by the processor, wherein a digest value associated with a first order of execution of the first and second instructions is a different value than a digest value associated with a second, different, order of execution of the first and second instructions; wherein the first and second instructions include at least one conditional instruction. - View Dependent Claims (21, 22, 23, 24, 25, 26)
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Specification