Pulse width modulation fan controller

• US 8,461,792 B2
• Filed: 05/13/2011
• Issued: 06/11/2013
• Est. Priority Date: 03/04/2011
• Status: Active Grant

• Current Assignee: Cloud Network Technology Singapore Pte. Ltd. (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Hon Hai Precision Industry Co., Ltd.
• Inventors: Huang, Chien-Jen, Chiu, Hsien-Chang
• Primary Examiner(s): Leykin, Rita
• Application Number:
  US13/106,866
• Publication Number:
  US 20120223666A1
• Time in Patent Office: 760 Days
• Field of Search: 318/471, 318/461, 318/456, 318/472, 318/599, 370/205, 370/212, 236/49.3, 700/299, 700/300
• US Class Current: 318/471
• CPC Class Codes: F04D 27/004 by varying driving speed
• CPC Class Codes: Y02B 30/70 Efficient control or regulation technologies, e.g. for control of refrigerant flow, motor or heating

Abstract

A pulse width modulation (PWM) fan controller includes a sensor, a generator, a selector, and a multiplexer. The sensor is configured for sensing a current temperature of an electronic device. The generator is configured for generating different PWM signals, each of which is suitable for regulating the rotational speed of a fan for dissipating heat for the electronic device of a corresponding temperature. The selector is configured for generating a selection control signal based upon the current temperature of the electronic device. The selection control signal is used for selecting a PWM signal corresponding to the current temperature of the electronic device from the PWM signals from the generator. The multiplexer is configured for performing the selection of the PWM signal.

Claims

1. A pulse width modulation (PWM) fan controller for an electronic device, comprising:

a sensor configured for sensing a current temperature of the electronic device and generating a corresponding temperature signal;

a generator configured for generating a plurality of PWM signals, each PWM signal having a unique duty cycle and is associated with a predetermined unique temperature range, the PWM signals configured for regulating rotational speed of a fan of the electronic device when the temperature of the electronic device falls within a corresponding predetermined unique temperature range such that the fan dissipates heat generated by the electronic device;

a selector connected to the sensor and configured for converting the temperature signal into a selection control signal, the selection control signal being configured for select a PWM signal corresponding to the current temperature of the electronic device from the PWM signals generated by the generator; and

a multiplexer connected to the generator and the selector, the multiplexer being configured for receiving the PWM signals from the generator, selecting the PWM signal corresponding to the current temperature of the electronic device based upon the selection control signal, and forwarding the PWM signal corresponding to the current temperature of the electronic device to regulate the rotational speed of the fan;

wherein the sensor comprises a thermistor;

wherein the PWM fan controller further comprises an AD converter configured for converting the temperature signal into a digital signal, which is processible by the selector;

wherein the AD converter comprises an AD input, a power source, a resistor, and a plurality of resistor groups, a plurality of comparators, and a plurality of AD outputs, the number of the resistor groups, the comparators, and the AD outputs is K, wherein K=2ⁿ−

1=N−

1, the resistor groups, the comparators, and the AD outputs are orderly arranged, the thermistor is connected between the AD input and ground, the resistor is connected between the AD input and the power source, the resistor groups are connected between the power source and ground and configured for outputting a plurality of predetermined reference voltages, the predetermined reference voltage of a latter resistor group is higher than that of a former resistor group, the thermistor, the resistor, and the resistor groups cooperatively define the predetermined unique temperature ranges, each comparator comprises a negative input, a positive input, and a comparator output, the AD input is connected to the negative inputs, the reference voltages are sent to the respective positive inputs, the comparator outputs are connected to the respective AD outputs.

2. The PWM fan controller of claim 1, wherein the electronic device is selected from the group consisting of a computer, a gaming device, and a multimedia player.

3. The PWM fan controller of claim 1, wherein the generator comprises a clock, a plurality of JK flip-flops, a plurality of AND gate converters, a plurality of OR gates, and a plurality of signal outputs, the number of the JK flip-flops is n, the number of the AND gate converters and the signal outputs 110 is N, and the number of the OR gates is K, wherein n, N, and K are positive integers and satisfy the formula:

N=2ⁿ=K+1, the signal outputs are orderly arranged and configured for outputting the respective PWM signals generated by the generator, the clock is configured for generating a timing signal, each JK flip-flop comprises a J input, a clock input, a K input, and a Q output, each clock input is connected to the clock to receive the timing signal, the JK flip-flops are orderly arranged, the J input and the K input of a later JK flip-flop are connected to the Q output of a former JK flip-flop, the JK flip-flops are configured for counting pulses of the timing signal CLK and outputting the count in a form of an n-bit binary digit via the Q outputs, the i₁-th bit of the count is output by the Q output of the i₁-th JK flip-flop, wherein i₁ is a positive integer and satisfies i₁≦

n, each AND gate converter comprises an AND gate, each AND gate comprises a plurality of AND inputs and an AND output, the number of the AND inputs of each AND gate converter 106 is n, the AND inputs of each AND gate are connected to the respective Q outputs, the AND gate converters are orderly arranged, the i₂-th AND gate converter is configured for converting the outputs of the Q outputs into the logic high level in the time period of the Ith pulse of the timing signal, wherein I=kN+i₂, and i₂, I, and k are positive integers, i_2≦

N, the OR gates are orderly arranged, the i₃-th OR gate comprises a plurality of OR inputs and an OR output, wherein i₃≦

k, the number of the OR inputs in the i₃-th OR gate is j, wherein j=i₃+1, the OR inputs of the i₃-th OR gate are connected to the respective AND outputs of the first j AND gate converters, the AND output of the first AND gate converter is connected to the first signal output, the OR output of the ith OR gate is connected to the j-th signal output.

4. The PWM fan controller of claim 3, wherein each of the first N−

1 AND gate converters employs at least one inverter in front of at least one respective AND input thereof, if the AND inputs employing the inverter are assigned with a binary digit “

0” and

the others are assigned with a binary digit “

1”

, the value of a n-bit binary digit consisted by the binary digits of the AND inputs of the i₂-th AND gate converter is i′

, wherein i′

=i₂−

1.

5. The PWM fan controller of claim 1, wherein the number of the PWM signals is N, wherein N is a positive integer, the multiplexer comprises a plurality of multiplexer inputs, a plurality of control terminals, and a multiplexer output, the number of the multiplexer inputs is N and the number of the control terminals is n, wherein N=2ⁿ, the multiplexer inputs are connected to the respective signal outputs, each of the multiplexer inputs has an address in a form of an n-bit binary digit, the selection control signal is also a n-bit binary digit, the bits of the selection control signal are sent to the respective control terminals, the multiplexer is configured for connect a multiplexer input, of which the address is identical to the selection control signal from the control terminals, to the multiplexer output.

6. The PWM fan controller of claim 1, wherein K=3, the thermistor, the resistor, and the resistor groups are set such that the AD converter satisfies the following table:

7. A pulse width modulation (PWM) fan controller for an electronic device, comprising:

a sensor configured for sensing a current temperature of the electronic device and generating a corresponding temperature signal;

a generator configured for generating a plurality of PWM signals, each PWM signal having a unique duty cycle and is associated with a predetermined unique temperature range, the PWM signals configured for regulating rotational speed of a fan of the electronic device when the temperature of the electronic device falls within a corresponding predetermined unique temperature range such that the fan dissipates heat generated by the electronic device;

a selector connected to the sensor and configured for converting the temperature signal into a selection control signal, the selection control signal being configured for select a PWM signal corresponding to the current temperature of the electronic device from the PWM signals generated by the generator; and

a multiplexer connected to the generator and the selector, the multiplexer being configured for receiving the PWM signals from the generator, selecting the PWM signal corresponding to the current temperature of the electronic device based upon the selection control signal, and forwarding the PWM signal corresponding to the current temperature of the electronic device to regulate the rotational speed of the fan;

wherein the generator comprises a clock, a plurality of JK flip-flops, a plurality of AND gate converters, a plurality of OR gates, and a plurality of signal outputs, the number of the JK flip-flops is n, the number of the AND gate converters and the signal outputs 110 is N, and the number of the OR gates is K, wherein n, N, and K are positive integers and satisfy the formula;

N=2ⁿ=K+1, the signal outputs are orderly arranged and configured for outputting the respective PWM signals generated by the generator, the clock is configured for generating a timing signal, each JK flip-flop comprises a J input, a clock input, a K input, and a Q output, each clock input is connected to the clock to receive the timing signal, the JK flip-flops are orderly arranged, the J input and the K input of a later JK flip-flop are connected to the Q output of a former JK flip-flop, the JK flip-flops are configured for counting pulses of the timing signal CLK and outputting the count in a form of an n-bit binary digit via the Q outputs, the i₁-th bit of the count is output by the Q output of the i₁-th JK flip-flop, wherein i₁ is a positive integer and satisfies i₁≦

n, each AND gate converter comprises an AND gate, each AND gate comprises a plurality of AND inputs and an AND output, the number of the AND inputs of each AND gate converter 106 is n, the AND inputs of each AND gate are connected to the respective Q outputs, the AND gate converters are orderly arranged, the i₂-th AND gate converter is configured for converting the outputs of the Q outputs into the logic high level in the time period of the Ith pulse of the timing signal, wherein I=kN+i₂, and i₂, I, and k are positive integers, i_2≦

N, the OR gates are orderly arranged, the i₃-th OR gate comprises a plurality of OR inputs and an OR output, wherein i₃≦

k, the number of the OR inputs in the i₃-th OR gate is j, wherein j=i₃+1, the OR inputs of the i₃-th OR gate are connected to the respective AND outputs of the first j AND gate converters, the AND output of the first AND gate converter is connected to the first signal output, the OR output of the ith OR gate is connected to the j-th signal output.

8. The PWM fan controller of claim 7, wherein each of the first N−

1 AND gate converters employs at least one inverter in front of at least one respective AND input thereof, if the AND inputs employing the inverter are assigned with a binary digit “

0” and

the others are assigned with a binary digit “

1”

, the value of a n-bit binary digit consisted by the binary digits of the AND inputs of the i₂-th AND gate converter is i′

, wherein i′

=i₂−

1.

9. A pulse width modulation (PWM) fan controller for an electronic device, comprising:

a sensor configured for sensing a current temperature of the electronic device and generating a corresponding temperature signal;

a generator configured for generating a plurality of PWM signals, each PWM signal having a unique duty cycle and is associated with a predetermined unique temperature range, the PWM signals configured for regulating rotational speed of a fan of the electronic device when the temperature of the electronic device falls within a corresponding predetermined unique temperature range such that the fan dissipates heat generated by the electronic device;

a selector connected to the sensor and configured for converting the temperature signal into a selection control signal, the selection control signal being configured for select a PWM signal corresponding to the current temperature of the electronic device from the PWM signals generated by the generator; and

a multiplexer connected to the generator and the selector, the multiplexer being configured for receiving the PWM signals from the generator, selecting the PWM signal corresponding to the current temperature of the electronic device based upon the selection control signal, and forwarding the PWM signal corresponding to the current temperature of the electronic device to regulate the rotational speed of the fan;

wherein the number of the PWM signals is N, wherein N is a positive integer, the multiplexer comprises a plurality of multiplexer inputs, a plurality of control terminals, and a multiplexer output, the number of the multiplexer inputs is N and the number of the control terminals is n, wherein N=2ⁿ, the multiplexer inputs are connected to the respective signal outputs, each of the multiplexer inputs has an address in a form of an n-bit binary digit, the selection control signal is also a n-bit binary digit, the bits of the selection control signal are sent to the respective control terminals, the multiplexer is configured for connect a multiplexer input, of which the address is identical to the selection control signal from the control terminals, to the multiplexer output.