Iterative interference suppression using mixed feedback weights and stabilizing step sizes

• US 8,462,901 B2
• Filed: 04/27/2011
• Issued: 06/11/2013
• Est. Priority Date: 11/15/2005
• Status: Active Grant

• Current Assignee: III Holdings 1, LLC (Intellectual Ventures LLC)
• Original Assignee: Rambus Inc.
• Inventors: Guess, Tommy, McCloud, Michael L, Nagarajan, Vijay, Lamba, Gagandeep Singh
• Primary Examiner(s): Kim, Kevin
• Application Number:
  US13/095,828
• Publication Number:
  US 20110200151A1
• Time in Patent Office: 776 Days
• Field of Search: 375/346, 375/347
• US Class Current: 375/346
• CPC Class Codes: H04B 1/7097 Interference-related aspects
• CPC Class Codes: H04B 1/71075 Parallel interference cancellation
• CPC Class Codes: H04B 1/712 Weighting of fingers for combining, e.g. amplitude control or phase rotation using an inner loop
• CPC Class Codes: H04B 2201/70702 Intercell-related aspects

Abstract

A receiver is configured for canceling intra-cell and inter-cell interference in coded, multiple-access, spread-spectrum transmissions that propagate through frequency-selective communication channels. The receiver employs iterative symbol-estimate weighting, subtractive cancellation with a stabilizing step-size, and mixed-decision symbol estimate. Receiver embodiments may be implemented explicitly in software of programmed hardware, or implicitly in standard Rake-based hardware either within the Rake (i.e., at the finger level) or outside the Rake (i.e., at the user of subchannel symbol level).

Claims

1. An interference suppression method, comprising:

configuring a processor for;

receiving a plurality of constituent signals;

combining the plurality of constituent signals to produce a synthesized received signal;

subtracting the synthesized received signal from a received signal to produce a residual signal; and

scaling the residual signal by a stabilizing step size to produce a scaled residual signal.

2. The method recited in claim 1, wherein the processor is further configured for combining the scaled residual signal with each of the plurality of constituent signals to form a plurality of interference suppressed constituent signals.

3. The method recited in claim 1, wherein the processor is further configured for combining the scaled residual signal with a subset of the plurality of constituent signals to form at least one interference suppressed constituent signal.

4. The method recited in claim 2, wherein the processor is further configured for:

time-advancing at least one of the plurality of interference suppressed constituent signals to produce at least one time-advanced signal;

weighting the at least one time-advanced signal; and

combining the time-advanced signals corresponding to a first user to produce a first combined user signal.

5. The method recited in claim 1, wherein the plurality of constituent signals is generated by a Rake receiver.

6. The method recited in claim 1, wherein the plurality of constituent signals comprises a plurality of advanced signals produced by advancing a received baseband signal by a plurality of multipath-delay quantities.

7. The method recited in claim 6, wherein the processor is further configured for scaling the plurality of advanced signals by corresponding path gains prior to combining the plurality of constituent signals.

8. The method recited in claim 1, wherein the processor is further configured for multiplying the synthesized received signal by complex conjugates of a plurality of users'"'"' coded waveforms and integrating the resultant products to despread the synthesized received signal.

9. The method recited in claim 1, wherein the plurality of constituent signals corresponds to a plurality of users.

10. The method recited in claim 1, wherein the plurality of constituent signals correspond to a plurality of rake fingers.

11. The method recited in claim 1, wherein the plurality of constituent signals corresponds to a plurality of users'"'"' code waveforms.

12. A computer-readable medium storing a computer program implementing the method of claim 1.

13. An interference suppression system, comprising:

a processor configured for;

receiving a plurality of constituent signals;

combining the plurality of constituent signals to produce a synthesized received signal;

subtracting the synthesized received signal from a received signal to produce a residual signal; and

scaling the residual signal by a stabilizing step size to produce a scaled residual signal.

14. The system recited in claim 13, wherein the processor is further configured for combining the scaled residual signal with each of the plurality of constituent signals to form a plurality of interference suppressed constituent signals.

15. The system recited in claim 13, wherein the processor is further configured for combining the scaled residual signal with a subset of the plurality of constituent signals to form at least one interference suppressed constituent signal.

16. The system recited in claim 14, wherein the processor is further configured for:

time-advancing at least one of the plurality of interference suppressed constituent signals to produce at least one time-advanced signal;

weighting the at least one time-advanced signal; and

combining the time-advanced signals corresponding to a first user to produce a first combined user signal.

17. The system recited in claim 13, wherein the plurality of constituent signals is generated by a Rake receiver.

18. The system recited in claim 13, wherein the plurality of constituent signals comprises a plurality of advanced signals produced by advancing a received baseband signal by a plurality of multipath-delay quantities.

19. The system recited in claim 18, wherein the processor is further configured for scaling the plurality of advanced signals by corresponding path gains prior to combining the plurality of constituent signals.

20. The system recited in claim 13, wherein the processor is further configured for multiplying the synthesized received signal by complex conjugates of a plurality of users'"'"' coded waveforms and integrating the resultant products to despread the synthesized received signal.

21. The system recited in claim 13, wherein the plurality of constituent signals corresponds to a plurality of users.

22. The system recited in claim 13, wherein the plurality of constituent signals corresponds to a plurality of rake fingers.

23. The system recited in claim 13, wherein the plurality of constituent signals corresponds to a plurality of users'"'"' code waveforms.

24. An interference suppression method, comprising:

configuring a processor for computing one or more interference-suppressed symbol estimates;

configuring the processor for de-biasing the input symbol estimates with a scale factor to produce de-biased input symbol estimates; and

configuring the processor for processing each of the one or more de-biased input symbol estimates to produce one of a hard decision or a soft decision.

25. The method recited in claim 24, wherein the processor is further configured to set the scale factor equal to estimates of an expected ratio of symbol amplitudes to amplitudes of the one or more input symbol estimates for each of the one or more input symbol estimates having a known constellation.

26. The method recited in claim 25, wherein the processor is further configured to produce de-biased symbol estimates characterized by

27. The method recited in claim 25, wherein the processor is further configured to produce de-biased symbol estimates characterized by

28. The method recited in claim 24, wherein the processor is further configured to set the de-bias scale factor of at least one symbol having a known constellation to unity.

29. The method recited in claim 24, wherein the processor is further configured for processing symbols with known constellations by partitioning a constellation space into hard- and soft-decision regions based on a function of proximity to nearby constellation points.

30. The method recited in claim 29, wherein the decision regions for at least one symbol are configured such that the hard-decision regions are collectively exhaustive so that only a hard decision is produced or the soft-decision regions are collectively exhaustive so that only a soft symbol decision is produced.

31. The method recited in claim 24, wherein the processor is further configured to perform a soft decision or a hard decision for at least one of the input symbol estimates based on a ratio of signal power to interference-plus-noise power for the at least one of the input symbol estimates.

32. The method recited in claim 31, wherein the processor is further configured to employ statistical signal processing for estimating the ratio of signal power to interference-plus-noise power.

33. The method recited in claim 32, wherein the processor is further configured to process a pilot signal for estimating the ratio of signal power to interference-plus-noise power.

34. The method recited in claim 24, wherein the processor is further configured to produce a hard decision that quantizes the input symbol estimate onto a nearby constellation point.

35. The method recited in claim 24, wherein the processor is further configured to produce a soft decision by scaling the input symbol estimate.

36. The method recited in claim 24, wherein the processor is further configured to set the scale factor to unity for input symbol estimates having constellations that are unknown to the receiver.

37. The method recited in claim 24, wherein the processor is further configured to synthesize an estimated received signal.

38. A computer-readable medium storing a computer program implementing the method of claim 24.

39. An interference suppression method, comprising:

configuring a processor for computing interference-suppressed symbol estimates;

configuring the processor for calculating a stabilizing step size having a magnitude that is a function of at least a received signal; and

configuring the processor for applying stabilizing step sizes to an error signal during each of at least one iteration.

40. The method recited in claim 39, wherein the processor is further configured for calculating the stabilizing step size as a function of the received signal and a synthesized received signal.

41. The method recited in claim 40, wherein the processor is further configured for calculating the error signal as a difference between the received signal and the synthesized received signal.

42. The method recited in claim 40, wherein the processor is further configured for producing a stabilizing step size characterized by

43. The method recited in claim 39, wherein the processor is further configured to calculate the stabilizing step size as a ratio of distance measurements between a received signal and at least one synthesized received signal.

44. The method recited in claim 43, wherein the ratio comprises a numerator and a denominator, and wherein the processor is further configured for:

calculating a first error vector for evaluating a first error signal as a difference between the received signal and a first synthesized received signal;

receiving from a Rake receiver a first plurality of resolved signals, wherein the first plurality of resolved signals correspond to each symbol source in a channel;

combining the first plurality of resolved signals to produce a first combined signal;

despreading the first combined signal into a first column vector;

calculating a second error vector as a difference between the received signal and a second synthesized received signal,

receiving from a Rake receiver a second plurality of resolved signals, wherein the second plurality of resolved signals correspond to each symbol source in the channel;

combining the second plurality of resolved signals to produce a second combined signal,

despreading the second combined signal into a second column vector;

scaling the first error vector with soft weights for producing a weighted first error vector;

evaluating an inner product between this weighted first error vector and the second error vector,

employing the inner product in the numerator; and

producing a synthesized received signal calculated from modeling a transmitted version of the first error vector,

producing a resolved composite signal,

producing a square magnitude of the resolved composite signal, and

integrating the square magnitude to calculate the denominator.

45. The method recited in claim 43, wherein the stabilizing step size is characterized by

46. The method recited in claim 39, wherein the processor is further configured for employing a function of channel-quality parameters to calculate the stabilizing step.

47. The method recited in claim 46, wherein the stabilizing step size is characterized by

48. The method recited in claim 39, wherein the processor is further configured to set the stabilizing step equal to a predetermined fixed value.

49. A computer-readable medium storing a computer program implementing the method of claim 39.

50. An interference suppression method employing at least one iteration for each of a plurality of input symbol estimates for converting the plurality of input symbol estimates into updated interference-suppressed symbol estimates, comprising:

configuring a processor for calculating at least one symbol weight from a function of an input symbol merit; and

configuring the processor for applying the at least one symbol weight to the plurality of input symbol estimates;

wherein the processor is further configured for measuring the input symbol merit as at least one of a set of functions, the set comprising a function of an average ratio of signal power to interference-plus-noise power, and a function of at least one of the plurality of input symbol estimates and proximity of at least one of the plurality of input symbol estimates to a nearby constellation point.

51. The method recited in claim 50, wherein the processor is further configured for processing a pilot signal for measuring the average ratio of signal power to interference-plus-noise power.

52. The method recited in claim 50, wherein the processor is further configured for employing at least one statistical signal processing technique for estimating the average ratio of signal power to interference-plus-noise power.

53. The method recited in claim 50, wherein the function of the average ratio of signal power to interference-plus-noise power is substantially characterized by

54. The method recited in claim 50, wherein the processor is further configured for time-series averaging for calculating the proximity as a statistical average.

55. The method recited in claim 50, wherein the at least one symbol weight is substantially characterized by:

56. The method recited in claim 50, wherein the at least one symbol weight comprises a plurality of symbol weights, and providing for calculating the at least one symbol weight comprises setting a subset of the plurality of symbol weights to zero.

57. The method recited in claim 56, wherein non-zero symbol weights of the plurality of symbol weights correspond to at least one of a set of symbols, the set comprising desired symbols and symbols corresponding to a predetermined group of strongest signals.

58. A computer-readable medium storing a computer program implementing the method of claim 50.