Thermal conduction paths for semiconductor structures

• US 8,466,054 B2
• Filed: 12/05/2011
• Issued: 06/18/2013
• Est. Priority Date: 12/13/2010
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: IO Semiconductor, Inc
• Inventors: Stuber, Michael A., Brindle, Chris, Molin, Stuart B.
• Primary Examiner(s): NGO, NGAN V
• Application Number:
  US13/311,454
• Publication Number:
  US 20120146193A1
• Time in Patent Office: 561 Days
• Field of Search: 438/598, 438/599, 257/E21.122
• US Class Current: 438/598
• CPC Class Codes: H01L 23/36 Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks H01L23/28, H01L23/40, H01L23/42, H01L23/44, H01L23/46 take precedence; heating H01L23/345
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]

Abstract

A thermal path is formed in a layer transferred semiconductor structure. The layer transferred semiconductor structure has a semiconductor wafer and a handle wafer bonded to a top side of the semiconductor wafer. The semiconductor wafer has an active device layer formed therein. The thermal path is in contact with the active device layer within the semiconductor wafer. In some embodiments, the thermal path extends from the active device layer to a substrate layer of the handle wafer. In some embodiments, the thermal path extends from the active device layer to a back side external thermal contact below the active device layer.

Claims

1. A method comprising:

forming an active device layer in a semiconductor wafer;

bonding a handle wafer to a top side of the semiconductor wafer; and

forming a thermal path in the semiconductor wafer, the thermal path being in contact with the active device layer.

2. The method of claim 1, further comprising:

forming the thermal path at least partway to a substrate layer of the handle wafer.

3. The method of claim 2, further comprising:

forming a back side external thermal contact on the semiconductor wafer; and

forming a second thermal path from the back side external thermal contact at least partway to the substrate layer of the handle wafer.

4. The method of claim 2, further comprising:

forming a back side external thermal contact on the semiconductor wafer; and

forming the thermal path in contact with the back side external thermal contact.

5. The method of claim 1, further comprising:

forming a back side external thermal contact on the semiconductor wafer; and

forming the thermal path to the back side external thermal contact.

6. The method of claim 1, further comprising:

forming the thermal path before the bonding of the handle wafer to the semiconductor wafer.

7. The method of claim 1, further comprising:

forming the thermal path after the bonding of the handle wafer to the semiconductor wafer.

8. The method of claim 7, wherein:

the handle wafer comprises a substrate layer; and

the thermal path extends from the active device layer to the substrate layer.

9. The method of claim 5, wherein:

the back side external thermal contact covers a substantial portion of a back side of the semiconductor wafer.

10. The method of claim 7, further comprising:

etching a back side of the semiconductor wafer to form an excavation area for the thermal path.

11. The method of claim 5, wherein:

a single deposition step forms both the back side external thermal contact and a portion of the thermal path, the portion of the thermal path being in contact with the active device layer.

12. The method of claim 7, further comprising:

forming a back side external thermal contact on the semiconductor wafer; and

forming the thermal path to the back side external thermal contact.

13. The method of claim 12, wherein:

the thermal path is formed of material that is not electrically conductive.

14. The method of claim 12, wherein:

the back side external thermal contact covers a substantial portion of a back side of the semiconductor wafer.

15. The method of claim 14, wherein:

the handle wafer comprises a substrate layer; and

the thermal path extends from the active device layer to the substrate layer.

16. The method of claim 1, further comprising:

forming a back side external thermal contact on the semiconductor wafer; and

forming a second thermal path extending from the back side external thermal contact to a substrate layer of the handle wafer;

wherein the back side external thermal contact is a part of the thermal path, the active device layer is in an active layer of the semiconductor wafer, and the thermal path terminates in the active layer.