Semiconductor device with enhanced mobility and method
First Claim
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1. A semiconductor device comprising:
- a region of semiconductor material having a major surface;
a trench control structure in the region of semiconductor material including a gate dielectric layer adjacent sidewall surfaces of the trench control structure and a gate electrode comprising a first conductive material overlying the gate dielectric layer, where the trench control structure further includes a shield electrode below the gate electrode, where the shield electrode is separated from the region of semiconductor material by a dielectric layer;
a body region within the region of semiconductor material and adjacent the trench control structure, where the trench control structure is configured to form a channel region within the body region, where the channel region includes a source end and a drain end;
a source region within the body region having a first side adjacent the trench control structure and a second side opposite to the first side;
a first feature comprising a material other than the first conductive material within the gate electrode, where the first feature is configured to induce stress within portions of the channel region; and
a second feature within the shield electrode, where the second feature is configured to induce stress within a drift region of the semiconductor device.
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Abstract
In one embodiment, a vertical insulated-gate field effect transistor includes a feature embedded within a control electrode. The feature is placed within the control electrode to induce stress within predetermined regions of the transistor.
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Citations
35 Claims
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1. A semiconductor device comprising:
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a region of semiconductor material having a major surface; a trench control structure in the region of semiconductor material including a gate dielectric layer adjacent sidewall surfaces of the trench control structure and a gate electrode comprising a first conductive material overlying the gate dielectric layer, where the trench control structure further includes a shield electrode below the gate electrode, where the shield electrode is separated from the region of semiconductor material by a dielectric layer; a body region within the region of semiconductor material and adjacent the trench control structure, where the trench control structure is configured to form a channel region within the body region, where the channel region includes a source end and a drain end; a source region within the body region having a first side adjacent the trench control structure and a second side opposite to the first side; a first feature comprising a material other than the first conductive material within the gate electrode, where the first feature is configured to induce stress within portions of the channel region; and a second feature within the shield electrode, where the second feature is configured to induce stress within a drift region of the semiconductor device. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. An insulating gate field effect transistor structure having enhanced mobility comprising:
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a region of semiconductor material having a first conductivity type, a first major surface, and a second major surface opposing the first major surface, where the region of semiconductor material at the second major surface is configured as a drain region; a trench structure within the region of semiconductor material comprising a shield electrode in a lower portion of a trench, where the shield electrode is separated from the region of semiconductor material by a first dielectric layer, and a gate electrode in an upper portion of the trench, wherein the gate electrode is separated from the region of semiconductor material by a second dielectric layer and separated from the shield electrode by a third dielectric layer; a body region having a second conductivity type opposite to the first conductivity type in the region of semiconductor material and adjacent to the trench structure, where the gate electrode is configured to form a channel region within the body region; a source region of the first conductivity type in spaced relationship with the body region having a first side adjacent to the trench structure and a second side opposite to the first side; a first region within the gate electrode and comprising a material configured to propagate stress within the region of semiconductor material adjacent to the trench control structure; and a second region formed within the shield electrode and comprising a material configured to propagate stress within a drift region of the structure. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19)
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20. A method for forming a semiconductor device comprising the steps of:
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providing a region of semiconductor material having a major surface; forming a trench control structure in the region of semiconductor material including a shield electrode separated from the region of semiconductor material by a dielectric layer, a first feature formed within the shield electrode, a gate dielectric layer overlying sidewall surfaces of the trench control structure, a gate electrode comprising a first conductive material overlying the gate dielectric layer, and a second feature comprising a material other than the first conductive material within the gate electrode; forming a body region within the region of semiconductor material and adjacent the trench control structure, where the trench control structure is configured to form a channel region within the body region; and forming a source region within the body region having a first side adjacent the trench control structure and a second side opposite to the first side, where the first feature is configured to induce stress within a drift region of the semiconductor device, and where the second feature is configured to induce stress within portions of the channel region. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28, 29, 30)
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31. A method of forming a semiconductor device having enhanced mobility comprising the steps of:
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providing a semiconductor material having a major surface and a drift region, where the device is configured as a vertical power semiconductor device; forming a trench control structure in the region of semiconductor material including a gate dielectric layer overlying sidewall surfaces of the trench control structure and a gate electrode comprising a first conductive material overlying the gate dielectric layer; forming a body region within the region of semiconductor material and adjacent the trench control structure, where the trench control structure is configured to form a channel region within the body region; forming a source region within the body region; forming a contact trench extending within the source region to form first and second source region portions; and forming a dielectric layer overlying exposed sidewall and lower surfaces of the contact trench, where the dielectric layer has thicker portions adjacent the sidewall surfaces, and where the thicker portions form dielectric features in spaced relationship with the semiconductor material, and where the dielectric features form stressed regions that propagate stress in proximity to the channel region. - View Dependent Claims (32, 33, 34)
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35. A method of forming a semiconductor device having enhanced mobility comprising the steps of:
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providing a semiconductor material having a major surface and a drift region, where the device is configured as a vertical power semiconductor device; forming a hard mask layer overlying the major surface and having an opening; forming a trench within the semiconductor material through the opening; forming a gate dielectric layer overlying sidewalls of the trench; forming a gate electrode recessed within the trench below the major surface, where the trench, gate dielectric layer and gate electrode are configured as a trench control structure; oxidizing an upper portion of a sidewall of the trench using the hard mask layer as an oxidation mask to form a dielectric feature overlying a portion of the major surface adjacent the trench and below the hard mask layer; forming a body region within the region of semiconductor material and adjacent the trench control structure, where the trench control structure is configured to form a channel region within the body region, and where the dielectric feature forms a stressed region that propagates stress in proximity to the channel region; forming a source region within the body region in proximity to the dielectric feature and the gate electrode; forming a contact trench adjacent the source region, where the forming the contact trench step forms a sloped sidewalls along a portion of the source region; and forming a contact layer within the contact trench.
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Specification