Stacked microelectronic assemblies having vias extending through bond pads

• US 8,466,542 B2
• Filed: 03/12/2010
• Issued: 06/18/2013
• Est. Priority Date: 03/13/2009
• Status: Active Grant

• Current Assignee: Tessera, Inc. (Adeia Inc.)
• Original Assignee: Tessera, Inc. (Adeia Inc.)
• Inventors: Kriman, Moshe, Avsian, Osher, Haba, Belgacem, Humpston, Giles, Burshtyn, Dmitri
• Primary Examiner(s): MITCHELL, JAMES M
• Application Number:
  US12/723,039
• Publication Number:
  US 20100230795A1
• Time in Patent Office: 1,194 Days
• Field of Search: 257/276, 257/686, 257/777
• US Class Current: 257/686
• CPC Class Codes: H01L 2224/02371 connecting the bonding area on a surface of the semiconductor or solid-state body with another surface of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/13024 the bump connector being disposed on a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/24145 the bodies being stacked
• CPC Class Codes: H01L 2225/06524 Electrical connections formed on device or on substrate, e.g. a deposited or grown layer
• CPC Class Codes: H01L 2225/06541 Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV] manufacturing via connections per se H01L21/76898
• CPC Class Codes: H01L 2225/06551 Conductive connections on the side of the device
• CPC Class Codes: H01L 23/481 Internal lead connections, e.g. via connections, feedthrough structures
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 25/50 Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/1461 MEMS

Abstract

A stacked microelectronic assembly is provided which includes first and second stacked microelectronic elements. Each of the first and second microelectronic elements can include a conductive layer extending along a face of such microelectronic element. At least one of the first and second microelectronic elements can include a recess extending from the rear surface towards the front surface, and a conductive via extending from the recess through the bond pad and electrically connected to the bond pad, with a conductive layer connected to the via and extending along a rear face of the microelectronic element towards an edge of the microelectronic element. A plurality of leads can extend from the conductive layers of the first and second microelectronic elements and a plurality of terminals of the assembly can be electrically connected with the leads.

Claims

1. A stacked microelectronic assembly, comprising:

first and second microelectronic elements each having a front face, a bond pad on the front face, a rear face remote from the front face, and edges extending between the front and rear faces, the microelectronic elements being stacked such that the front face of the first microelectronic element is adjacent one of the front or rear faces of the second microelectronic element, the microelectronic assembly having a face overlying one of the front or rear faces of each of the first and second microelectronic elements,

wherein each of the first and second microelectronic elements includes a conductive layer extending along at least one of the front or the rear face of such microelectronic element, and at least one of the first and second microelectronic elements includes;

a) a recess extending from the rear face towards the front face, and b) a conductive via extending from the recess of the least one microelectronic element through the bond pad of the at least one microelectronic element and electrically connected to such bond pad, wherein the conductive layer of the at least one microelectronic element extends along the rear face of the least one microelectronic element and is electrically connected to the via;

a plurality of leads extending from the conductive layers of the first and second microelectronic elements; and

a plurality of terminals of the assembly electrically connected with the leads,

wherein the microelectronic assembly has at least one external edge surface extending away from the face, each external edge surface extending along the edges of the first and second microelectronic elements, the leads extending along the at least one external edge surface and onto the face of the assembly.

2. The microelectronic assembly as claimed in claim 1, wherein the leads extend onto the face of the assembly and the terminals are exposed at the face of the assembly.

3. The microelectronic assembly as claimed in claim 1, wherein the microelectronic assembly has at least one opening extending through at least one of the first and second microelectronic elements, and the leads extend along a surface of the at least one opening.

4. The microelectronic assembly as claimed in claim 1, wherein each of the first and second microelectronic elements includes the recess and the conductive via, and the conductive layer of each microelectronic element is electrically connected to the via of such microelectronic element.

5. The microelectronic assembly as claimed in claim 1, wherein the first microelectronic element includes the recess and the conductive via, the conductive layer of the first microelectronic element being electrically connected to the via of the first microelectronic element, and the conductive layer of the second microelectronic element electrically contacts a surface of the bond pad thereof, the surface extending along the front face of the second microelectronic element.

6. The microelectronic assembly as claimed in claim 1, wherein the conductive layer of the at least one microelectronic element extends conformally along a surface of the recess, and the assembly further includes a dielectric layer overlying the conductive layer within the recess.

7. The microelectronic assembly as claimed in claim 6, wherein the conductive via includes a conductive layer lining a hole extending through the bond pad, wherein the dielectric layer overlies the conductive layer within the hole.

8. The microelectronic assembly as claimed in claim 1, further comprising dielectric layers having surfaces extending beyond the edges of the microelectronic elements, wherein the conductive layers extend in a first direction along the surfaces of the dielectric layers beyond the edges.

9. The microelectronic assembly as claimed in claim 8, wherein at least one of the leads includes a portion extending in a first direction along the portion of at least one of the conductive layers, the lead portion electrically contacting the conductive layer portion.

10. The microelectronic assembly as claimed in claim 1, wherein the at least one lead is a first lead, wherein at least one second lead includes a conductive via extending through the lead portion and the conductive layer portion.

11. The microelectronic assembly as claimed in claim 1, wherein the recess is a first recess, and the edge of the at least one microelectronic element including a second recess, wherein the conductive layer extends along a surface of the second recess.

12. The microelectronic assembly as claimed in claim 11, wherein the conductive layers further extend onto major surfaces of dielectric layers beyond the second recesses.

13. The microelectronic assembly as claimed in claim 1, wherein the first microelectronic element further includes an image sensor, and the assembly further includes a transparent lid overlying the image sensor.

14. The microelectronic assembly as claimed in claim 13 wherein a cavity is disposed between the lid and a face of the microelectronic element, the image sensor being aligned with the cavity.

15. The microelectronic assembly as claimed in claim 1, further including a lid mounted above the front face of the first microelectronic element, wherein a cavity is disposed between the front face and the lid, the first microelectronic element including a micro-electromechanical system (“

MEMS”

) device aligned with the cavity.

16. The microelectronic assembly of claim 1, wherein the recess is tapered, becoming smaller with increasing distance from the rear face of the at least one microelectronic element.

17. The microelectronic assembly of claim 16, wherein walls of the recess are oriented at an angle of about 5 degrees or greater with respect to a normal to the rear face of the at least one microelectronic element.

18. The microelectronic assembly of claim 17, wherein the walls are oriented at an angle of less than or equal to about 40 degrees with respect to a normal to the rear face of the at least one microelectronic element.

19. The microelectronic assembly of claim 1, wherein a dielectric layer contacts the bond pad within the recess, the conductive via extends through the dielectric layer and the bond pad, and an entire area of the via in a direction along a major surface of the bond pad is enclosed within an area of the major surface of the bond pad.

20. A method is provided for forming a microelectronic assembly having a plurality of stacked microelectronic elements therein, the method comprising:

forming a plurality of subassemblies, each formed using steps including;

(a) bonding a microelectronic element to a carrier such that a plurality of metallic pads exposed at a front face of the microelectronic element confront the carrier;

(b) forming a recess extending from a rear face of a microelectronic element towards the metallic pad exposed at the front face of the microelectronic element;

(c) depositing a dielectric layer onto the rear face and into the recess;

(d) forming a hole extending through the dielectric layer within the recess and through the metallic pad within the recess; and

(e) forming a conductive layer overlying the dielectric layer and extending along the rear face and within the hole, the conductive layer being electrically connected to the metallic pad;

stacking the plurality of subassemblies in at least approximate alignment, with the carrier between at least adjacent subassemblies optionally removed; and

forming leads and terminals electrically connected to the conductive layers of the microelectronic elements of the plurality of subassemblies.

21. The method as claimed in claim 20, wherein step (b) includes removing semiconductor material of the microelectronic element until a second dielectric layer is exposed, the second dielectric layer contacting a surface of the metallic pad, and step (d) includes forming the through hole extending through the dielectric layer, the second dielectric layer and the metallic pad.

22. A method of forming a microelectronic package, comprising:

(a) forming a recess extending from a rear face of a microelectronic element towards a metallic pad exposed at a front face of the microelectronic element;

(b) depositing a dielectric layer onto the rear face and into the recess;

(c) patterning the dielectric layer overlying the rear face;

(d) forming a hole extending through the dielectric material and through the metallic pad; and

(e) forming a conductive layer overlying the dielectric layer and extending along the rear face and within the hole, the conductive layer being electrically connected to the metallic pad.

23. A method of forming a plurality of microelectronic assemblies, comprising:

forming a plurality of subassemblies, each formed using steps including;

(a) mounting a plurality of first microelectronic elements atop a dielectric element, each first microelectronic element having a front face adjacent the dielectric element and a plurality of metallic pads exposed at the front face;

(b) forming recesses extending from rear faces of the first microelectronic elements towards the front faces;

(c) forming a dielectric layer between edges of the first microelectronic elements, the dielectric layer extending onto the rear faces of the first microelectronic elements and into the recesses;

(d) forming through holes extending from the recesses through the metallic pads; and

(e) forming conductive elements extending within the recesses and the through holes and along the rear faces of the first microelectronic elements towards edges of the first microelectronic elements, the conductive elements electrically contacting the metallic pads within the through holes;

stacking the plurality of subassemblies in at least approximate alignment, with the dielectric element between at least adjacent subassemblies optionally removed;

forming leads electrically connected with the conductive elements of the microelectronic elements of the subassemblies; and

severing the plurality of stacked subassemblies along edges of the microelectronic elements into individual microelectronic assemblies, each microelectronic assembly including terminals electrically connected to the metallic pads of the microelectronic elements of the subassemblies therein.