Semiconductor device and method for manufacturing the same

• US 8,471,256 B2
• Filed: 11/24/2010
• Issued: 06/25/2013
• Est. Priority Date: 11/27/2009
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Yamazaki, Shunpei, Hosoba, Miyuki, Hiraishi, Suzunosuke
• Primary Examiner(s): HOANG, QUOC DINH
• Application Number:
  US12/954,181
• Publication Number:
  US 20110127524A1
• Time in Patent Office: 944 Days
• Field of Search: 257/59, 257/72, 257/291, 257/E29.117
• US Class Current: 257/59
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 33/0041 characterised by field-effect operation
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs

Abstract

Disclosed is a semiconductor device comprising a thin film transistor and wirings connected to the thin film transistor, in which the thin film transistor has a channel formation region in an oxide semiconductor layer, and a copper metal is used for at least one of a gate electrode, a source electrode, a drain electrode, a gate wiring, a source wiring, and a drain wiring. The extremely low off current of the transistor with the oxide semiconductor layer contributes to reduction in power consumption of the semiconductor device. Additionally, the use of the copper metal allows the combination of the semiconductor device with a display element to provide a display device with high display quality and negligible defects, which results from the low electrical resistance of the wirings and electrodes formed with the copper metal.

Claims

1. A semiconductor device comprising:

an insulating base film over a substrate;

a gate electrode over the insulating base film;

a first insulating layer over and in contact with the insulating base film and the gate electrode;

an oxide semiconductor layer over the first insulating layer;

a source electrode and a drain electrode over and in electrical contact with the oxide semiconductor layer; and

a second insulating layer over and in contact with the oxide semiconductor layer, the source electrode, and the drain electrode,

wherein the source electrode and the drain electrode each comprise;

a first layer over the oxide semiconductor layer, the first layer comprising copper; and

a second layer over the first layer, the second layer comprising a conductive metal nitride.

2. The semiconductor device according to claim 1, wherein at least one of the insulating base film and the first insulating layer comprises silicon nitride.

3. The semiconductor device according to claim 1,

wherein the first insulating layer comprises silicon nitride.

4. The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

5. The semiconductor device according to claim 1,

wherein the gate electrode comprises a first gate electrode layer and a second gate electrode layer,

wherein the first gate electrode layer comprises copper, and

wherein the second gate electrode layer comprises a metal selected from Cr, Ta, Ti, Mo, and W.

6. The semiconductor device according to claim 1,

wherein the gate electrode comprises a first gate electrode layer and a second gate electrode layer,

wherein the first gate electrode layer comprises copper, and

wherein the second gate electrode layer is an aluminum layer in which an element selected from Si, Ti, Ta, W, Mo, Cr, Nd, Sc, and Y is included.

7. The semiconductor device according to claim 1,

wherein the source electrode and the drain electrode each comprise a third layer interposed between the oxide semiconductor layer and the first layer, and

wherein the third layer comprises a metal selected from Cr, Ta, Ti, Mo, and W.

8. The semiconductor device according to claim 1,

wherein the source electrode and the drain electrode each comprise a third layer interposed between the oxide semiconductor layer and the first layer, and

wherein the third layer is an aluminum layer in which an element selected from Si, Ti, Ta, W, Mo, Cr, Nd, Sc, and Y is included.

9. The semiconductor device according to claim 1, further comprising a first conductive layer between the oxide semiconductor layer and the source electrode and between the oxide semiconductor layer and the drain electrode,

wherein the first conductive layer comprises a material selected from Ti, Mn, Mg, Zr, Y, Al, W, and Mo.

10. The semiconductor device according to claim 1, wherein the gate electrode is sealed by the insulating base film and the first insulating layer.

11. The semiconductor device according to claim 1, wherein the oxide semiconductor layer is sealed by the first insulating layer and the second insulating layer.

12. The semiconductor device according to claim 1, further comprising a second conductive layer over the second insulating layer,

wherein the second conductive layer comprises copper.

13. An electronic device including the semiconductor device according to claim 1.

14. A semiconductor device comprising:

an insulating base film over a substrate;

a gate electrode over the insulating base film;

a first insulating layer over and in contact with the insulating base film and the gate electrode;

an oxide semiconductor layer over the first insulating layer;

a source electrode and a drain electrode over and in electrical contact with the oxide semiconductor layer; and

a second insulating layer over and in contact with the oxide semiconductor layer, the source electrode, and the drain electrode,

wherein the source electrode and the drain electrode each comprise;

a first layer being in contact with the first insulating layer and comprising a conductive metal nitride;

a second layer being over the first layer and comprising copper; and

a third layer over the second layer, the third layer comprising the conductive metal nitride.

15. The semiconductor device according to claim 14, wherein the gate electrode comprises copper.

16. The semiconductor device according to claim 14, wherein the insulating base film comprises silicon nitride.

17. The semiconductor device according to claim 14, wherein the first insulating layer comprises silicon nitride.

18. The semiconductor device according to claim 14, wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

19. The semiconductor device according to claim 14,

wherein the gate electrode comprises a first gate electrode layer and a second gate electrode layer,

wherein the first gate electrode layer comprises copper, and

wherein the second gate electrode layer comprises a metal selected from Cr, Ta, Ti, Mo, and W.

20. The semiconductor device according to claim 14,

wherein the gate electrode comprises a first gate electrode layer and a second gate electrode layer,

wherein the first gate electrode layer comprises copper, and

wherein the second gate electrode layer is an aluminum layer in which an element selected from Si, Ti, Ta, W, Mo, Cr, Nd, Sc, and Y is included.

21. The semiconductor device according to claim 14, further comprising a first conductive layer between the oxide semiconductor layer and the source electrode and between the oxide semiconductor layer and the drain electrode,

wherein the first conductive layer comprises a material selected from Ti, Mn, Mg, Zr, Y, Al, W, and Mo.

22. The semiconductor device according to claim 14, wherein the gate electrode is sealed by the insulating base film and the first insulating layer.

23. The semiconductor device according to claim 14, wherein the oxide semiconductor layer is sealed by the first insulating layer and the second insulating layer.

24. The semiconductor device according to claim 14, further comprising a second conductive layer over the second insulating layer,

wherein the second conductive layer comprises copper.

25. The semiconductor device according to claim 14, wherein the conductive metal nitride is selected from titanium nitride, tantalum nitride, and tungsten nitride.

26. An electronic device including the semiconductor device according to claim 14.

27. A semiconductor device comprising:

an insulating base film over a substrate;

a gate electrode over the insulating base film;

a first insulating layer over and in contact with the insulating base film and the gate electrode;

an oxide semiconductor layer over the first insulating layer;

a second insulating layer over and in contact with the oxide semiconductor layer;

a source electrode and a drain electrode over and in contact with the oxide semiconductor layer and the second insulating layer; and

a third insulating layer over and in contact with the second insulating layer, the source electrode, and the drain electrode,

wherein at least one of the gate electrode, the source electrode, and the drain electrode comprises copper.

28. The semiconductor device according to claim 27, wherein the insulating base film comprises silicon nitride.

29. The semiconductor device according to claim 27, wherein the first insulating layer comprises silicon nitride.

30. The semiconductor device according to claim 27, wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

31. The semiconductor device according to claim 27, wherein the second insulating layer is selected from an oxide, a nitride, an oxynitride, and a nitride oxide of a metal selected from aluminum, tantalum, yttrium, and hafnium.

32. The semiconductor device according to claim 27,

wherein the gate electrode comprises a first layer and a second layer,

wherein the first layer comprises copper, and

wherein the second layer comprises a metal selected from Cr, Ta, Ti, Mo, and W.

33. The semiconductor device according to claim 27,

wherein the gate electrode comprises a first layer and a second layer,

wherein the first layer comprises copper, and

wherein the second layer is an aluminum layer in which an element selected from Si, Ti, Ta, W, Mo, Cr, Nd, Sc, and Y is included.

34. The semiconductor device according to claim 27,

wherein the source electrode and the drain electrode each comprise a third layer and a fourth layer,

wherein the third layer comprises copper, and

wherein the fourth layer comprises a metal selected from Cr, Ta, Ti, Mo, and W.

35. The semiconductor device according to claim 27,

wherein the source electrode and the drain electrode each comprise a third layer and a fourth layer,

wherein the third layer comprises copper, and

wherein the fourth layer is an aluminum layer in which an element selected from Si, Ti, Ta, W, Mo, Cr, Nd, Sc, and Y is included.

36. The semiconductor device according to claim 27, further comprising a first conductive layer between the oxide semiconductor layer and the source electrode and between the oxide semiconductor layer and the drain electrode,

wherein the first conductive layer comprises a material selected from Ti, Mn, Mg, Zr, Y, Al, W, and Mo.

37. The semiconductor device according to claim 27, wherein the gate electrode is sealed by the insulating base film and the first insulating layer.

38. The semiconductor device according to claim 27, wherein the oxide semiconductor layer is sealed by the first insulating layer and the third insulating layer.

39. The semiconductor device according to claim 27, further comprising a second conductive layer over the second insulating layer,

wherein the second conductive layer comprises copper.

40. An electronic device including the semiconductor device according to claim 27.

41. A semiconductor device comprising:

a gate electrode over a substrate;

a gate insulating layer over the gate electrode;

an oxide semiconductor layer over the gate insulating layer;

a second silicon oxide layer comprising a region which is in contact with the oxide semiconductor layer; and

a source electrode and a drain electrode over the second silicon oxide layer,

wherein the gate electrode comprises a stack of a first layer comprising Ti and a second layer comprising Cu,

wherein the gate insulating layer comprises a stack of a silicon nitride layer and a first silicon oxide layer, and

wherein the silicon nitride layer covers the second layer.

42. The semiconductor device according to claim 41,

wherein the oxide semiconductor layer comprises indium, gallium, zinc, and oxygen,

wherein the source electrode and the drain electrode are each a stack of a third layer comprising an element selected from Cr, Ta, Ti, Mo, and W and a fourth layer comprising Cu, and

wherein an interface between the oxide semiconductor layer and the source electrode and an interface between the oxide semiconductor layer and the drain electrode each comprise a region having an excessive amount of indium.

43. The semiconductor device according to claim 41,

wherein the oxide semiconductor layer comprises indium, gallium, zinc, and oxygen,

wherein the source electrode and the drain electrode are each a stack of a third layer comprising an element selected from Cr, Ta, Ti, Mo, and W and a fourth layer comprising Cu, and

wherein an interface between the oxide semiconductor layer and the source electrode and an interface between the oxide semiconductor layer and the drain electrode each comprise titanium oxide.

44. The semiconductor device according to claim 41,

wherein the oxide semiconductor layer comprises indium, gallium, zinc, and oxygen,

wherein the source electrode and the drain electrode are each a stack of a third layer comprising an element selected from Cr, Ta, Ti, Mo, and W and a fourth layer comprising Cu, and

wherein an interface between the oxide semiconductor layer and the source electrode and an interface between the oxide semiconductor layer and the drain electrode each comprise a region having an excessive amount of indium and an excessive amount of titanium.

45. The semiconductor device according to claim 41,

wherein the oxide semiconductor layer comprises a crystal whose grain size is greater than or equal to 1 nm and less than or equal to 20 nm.

46. The semiconductor device according to claim 41,

wherein a carrier concentration of the oxide semiconductor layer is lower than 1×

10¹² cm<sup>−

3</sup>.

47. A semiconductor device comprising:

a gate electrode over a substrate;

a gate insulating layer over the gate electrode;

an oxide semiconductor layer over the gate insulating layer;

a second silicon oxide layer comprising a region which is in contact with the oxide semiconductor layer; and

a source electrode and a drain electrode over the second silicon oxide layer,

wherein the gate electrode comprises a stack of a first layer comprising an element selected from Cr, Ta, Ti, Mo, and W and a second layer comprising Cu,

wherein the gate insulating layer comprises a stack of a silicon nitride layer and a first silicon oxide layer, and

wherein the silicon nitride layer comprises a region which is in contact with the second layer.

48. The semiconductor device according to claim 47,

wherein the oxide semiconductor layer comprises indium, gallium, zinc, and oxygen,

wherein the source electrode and the drain electrode are each a stack of a third layer comprising an element selected from Cr, Ta, Ti, Mo, and W and a fourth layer comprising Cu, and

wherein an interface between the oxide semiconductor layer and the source electrode and an interface between the oxide semiconductor layer and the drain electrode each comprise a region having an excessive amount of indium.

49. The semiconductor device according to claim 47,

wherein the oxide semiconductor layer comprises indium, gallium, zinc, and oxygen,

wherein the source electrode and the drain electrode are each a stack of a third layer comprising an element selected from Cr, Ta, Ti, Mo, and W and a fourth layer comprising Cu, and

wherein an interface between the oxide semiconductor layer and the source electrode and an interface between the oxide semiconductor layer and the drain electrode each comprise titanium oxide.

50. The semiconductor device according to claim 47,

wherein the oxide semiconductor layer comprises indium, gallium, zinc, and oxygen,

wherein the source electrode and the drain electrode are each a stack of a third layer comprising an element selected from Cr, Ta, Ti, Mo, and W and a fourth layer comprising Cu, and

wherein an interface between the oxide semiconductor layer and the source electrode and an interface between the oxide semiconductor layer and the drain electrode each comprise a region having an excessive amount of indium and an excessive amount of titanium.

51. The semiconductor device according to claim 47,

wherein the oxide semiconductor layer comprises a crystal whose grain size is greater than or equal to 1 nm and less than or equal to 20 nm.

52. The semiconductor device according to claim 47,

wherein a carrier concentration of the oxide semiconductor layer is lower than 1×

10¹² cm<sup>−

3</sup>.