Nitride semiconductor substrate, semiconductor device, and methods for manufacturing nitride semiconductor substrate and semiconductor device

• US 8,471,365 B2
• Filed: 07/09/2010
• Issued: 06/25/2013
• Est. Priority Date: 09/24/2009
• Status: Active Grant

• Current Assignee: Mitsubishi Chemical Corporation (Mitsubishi Chemical Group Corp.)
• Original Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Inventors: Matsumoto, Naoki, Mikami, Hidenori, Yamaguchi, Sayuri
• Primary Examiner(s): Nguyen, Thinh T
• Application Number:
  US12/833,145
• Publication Number:
  US 20110068434A1
• Time in Patent Office: 1,082 Days
• Field of Search: 257/615, 257/E29.089, 257/11.183, 257/E21.09, 257/76, 257/79, 257/618, 257/496, 257/613, 438/478, 438/47, 438/492
• US Class Current: 257/615
• CPC Class Codes: C30B 29/406 Gallium nitride
• CPC Class Codes: C30B 33/00 After-treatment of single crystals or homogeneous polycrystalline material with defined structure C30B31/00 takes precedence
• CPC Class Codes: H01L 21/02021 Edge treatment, chamfering
• CPC Class Codes: Y10T 83/04 Processes

Abstract

A nitride semiconductor substrate having a main surface serving as a semipolar plane and provided with a chamfered portion capable of effectively preventing cracking and chipping, a semiconductor device fabricated using the nitride semiconductor substrate, and a method for manufacturing the nitride semiconductor substrate and the semiconductor device are provided. The nitride semiconductor substrate includes a main surface inclined at an angle of 71° or more and 79° or less with respect to the (0001) plane toward the [1-100] direction or inclined at an angle of 71° or more and 79° or less with respect to the (000-1) plane toward the [−1100] direction; and a chamfered portion located at an edge of an outer periphery of the main surface. The chamfered portion is inclined at an angle θ1 or θ2 of 5° or more and 45° or less with respect to adjacent one of the main surface and a backside surface on a side opposite to the main surface. Accordingly, cracking and chipping occurring from the edge of the outer periphery of the nitride semiconductor substrate can be effectively suppressed.

Claims

1. A nitride semiconductor substrate comprising:

a main surface inclined at an angle of 71°

or more and 79°

or less with respect to a (0001) plane toward a [1-100] direction or inclined at an angle of 71°

or more and 79°

or less with respect to a (000-1) plane toward a [−

1100] direction; and

a chamfered portion located at an edge of an outer periphery of said main surface,

said chamfered portion being inclined at an angle of 5°

or more and 45°

or less with respect to adjacent one of said main surface and a backside surface on a side opposite to said main surface,

said chamfered portion includes a topside chamfer formed on the main surface side and a backside chamfer formed on the backside surface side, and

a damaged layer formed in the topside chamfer has a thickness greater than that of a damaged layer formed in the backside chamfer.

2. The nitride semiconductor substrate according to claim 1, wherein a damaged layer having an average thickness of 0.5 μ

m or more and 10 μ

m or less is formed on a surface layer of said chamfered portion.

3. The nitride semiconductor substrate according to claim 1, wherein a chamfering amount of said chamfered portion is 0.02 mm or more and 0.5 mm or less.

4. The nitride semiconductor substrate according to claim 1, wherein a surface roughness of said chamfered portion is 0.07 μ

m or more and 3 μ

m or less in terms of Ra.

5. A semiconductor device fabricated using the nitride semiconductor substrate according to claim 1.