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Battery fault tolerant architecture for cell failure modes parallel bypass circuit

  • US 8,471,529 B2
  • Filed: 10/14/2010
  • Issued: 06/25/2013
  • Est. Priority Date: 10/14/2010
  • Status: Active Grant
First Claim
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1. A battery circuit comprising a plurality of battery modules electrically coupled in parallel, each battery module including a plurality of battery cells electrically coupled in series, each battery module also including a control device operable to disconnect the battery module from the other battery modules in response to battery cell failure or potential failure, wherein the control device includes a logic circuit, a first current path including a first switch and a second current path including a second switch, where the first current path allows current to flow into the module and the second current path allows current to flow out of the module, and wherein the logic circuit opens the second switch and controls the opening and closing of the first switch when the module is being charged where the time that the first switch is closed is based on a state of charge range of the module compared to the state of charge range of a higher performing module in the battery circuit, and wherein the logic circuit opens the first switch and controls the opening and closing of the second switch when the module is being discharged where the time that the second switch is closed is also based on the state of charge range of the module compared to the state of charge range of the higher performing module in the battery circuit.

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