Apparatus and method for timing synchronization in a communication system

• US 8,472,370 B2
• Filed: 02/01/2010
• Issued: 06/25/2013
• Est. Priority Date: 02/02/2009
• Status: Expired due to Fees

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Shin, Seung-Woo, Kim, Ki-Hyun
• Primary Examiner(s): LIU, JUNG
• Application Number:
  US12/658,038
• Publication Number:
  US 20100195565A1
• Time in Patent Office: 1,240 Days
• Field of Search: 370/203, 370204-215, 370216-228, 370229-240, 370241-253, 370254-271, 370310-337, 370338-350, 370351-394, 370/395.1, 370/395.3, 370/395.4, 370/395.41, 370/395.42, 370/395.5, 370/395.52, 370/395.53, 370412-421, 370431-457, 370458-463, 370464-497, 370498-522, 370523-520, 370521-529
• US Class Current: 370/326
• CPC Class Codes: H04J 3/0644 External master-clock
• CPC Class Codes: H04J 3/0682 by delay compensation, e.g. by compensation of propagation delay or variations thereof, by ranging
• CPC Class Codes: H04L 43/0852 Delays

Abstract

An apparatus is capable of restoring a clock of a second node in a communication system with a symmetric network construction of a first node that is capable of receiving a Global Positioning System (GPS) signal, and the second node that is not capable of receiving a GPS signal. The method includes identifying synchronization information received from the first node, determining a delay with the first node, generating a clock using the synchronization information and delay, removing a clock phase being out of a reference range in a phase identification interval, dividing the phase identification interval into at least two subdivision intervals, and removing a clock phase being out of a normal operation range of a phase in each subdivision interval.

Claims

1. A method for restoring a clock of a second node in a communication system with a symmetric network construction of a first node configured to receive a Global Positioning System (GPS) signal, the second node not configured to receive the GPS signal, the method comprising:

receiving synchronization information from the first node;

determining a delay of the clock relative to the first node;

generating the clock using the synchronization information and the delay;

removing a clock phase that is out of a reference range in a phase identification interval;

dividing the phase identification interval into at least two subdivision intervals;

selecting a minimum clock phase value from each subdivision interval; and

removing the minimum clock phase value that is out of a specified normal operation range for each subdivision interval.

2. The method of claim 1, wherein receiving the synchronization information comprises receiving synchronization information comprised in packets from the first node through a wired network.

3. The method of claim 1, wherein determining the delay comprises:

transmitting a delay request message to the first node;

in response to receiving a delay response message from the first node, identifying, in the delay response message, a request receive time at which the first node receives the delay request message and a response transmit time at which the first node transmits the delay response message; and

determining the delay with the first node using a request transmit time at which the delay request message was transmitted, a response receive time at which the delay response message was received, the request receive time, and the response transmit time.

4. The method of claim 1, wherein removing the clock phase that is out of the reference range comprises:

determining the clock phase comprised in the phase identification interval; and

removing the clock phase that is out of the reference range in the phase identification interval.

5. The method of claim 1, wherein removing the clock phase that is out of the reference range comprises:

determining the clock phase comprised in the phase identification interval; and

replacing the clock phase that is out of the reference range in the phase identification interval with an average clock phase value.

6. The method of claim 1, wherein the reference range is set to have a specified error range based on an average of clock phases over a specified period of time.

7. The method of claim 1, wherein removing the clock phase that is out of the specified normal operation range comprises:

determining, for each subdivision interval, whether the minimum clock phase value is included in a table comprising phase information for normal operation of the second node; and

discarding the minimum clock phase value that is not included in the table.

8. The method of claim 7, wherein the table comprises clock phase information arranged by normal operation temperatures of the second node.

9. The method of claim 1, wherein removing the clock phase that is out of the specified normal operation range comprises:

determining, for each subdivision interval, whether the minimum clock phase value is included in a table comprising phase information for normal operation of the second node; and

replacing the minimum clock phase value that is not included in the table with an average minimum clock phase value.

10. The method of claim 9, wherein the average minimum clock phase value is continuously calculated using a vector component.

11. The method of claim 1, further comprising, outputting a clock when the minimum clock phase value is within the specified normal operation range.

12. An apparatus configured to restore a clock of a second node in a communication system with a symmetric network construction of a first node configured to receive a Global Positioning System (GPS) signal, the second node not configured to receive a GPS signal, the apparatus comprising:

an interface configured to communicate with the first node;

a delay determiner configured to determine a delay of the clock relative to the first node;

a clock generator configured to generate the clock using synchronization information received from the first node through the interface and the delay determined in the delay determiner; and

a clock corrector configured to;

remove a clock phase that is out of a reference range in a phase identification interval among clocks generated in the clock generator;

select a minimum clock phase value from each subdivision interval; and

remove the minimum clock phase value that is out of a specified normal operation range for each subdivision interval.

13. The apparatus of claim 12, wherein the clock generator is configured to generate the clock using the synchronization information comprised in packets received from the first node through a wired network and the delay determined in the delay determiner.

14. The apparatus of claim 12, wherein the delay determiner is further configured to transmit a delay request message to the first node through the interface and receive a delay response message from the first node through the interface, and wherein the delay determiner is configured to determine the delay with the first node based on a request transmit time for transmitting the delay request message, a response receive time for receiving the delay response message, a request receive time at which the first node receives the delay request message, and a request transmit time at which the first node transmits the delay response message, which are determined in the delay response message.

15. The apparatus of claim 12, wherein the clock corrector comprises a phase filter configured to remove the clock phase that is out of a reference range in the phase identification interval.

16. The apparatus of claim 12, wherein the clock corrector comprises a phase filter for replacing the clock phase that is out of a reference range in the phase identification interval with an average clock phase value.

17. The apparatus of claim 12, wherein the clock corrector is configured to determine whether to remove the clock phase using a reference range that is set to have a specified error range on the basis of an average of clock phases of a specified period of time.

18. The apparatus of claim 12, wherein the clock corrector comprises:

a phase filter configured to remove the clock phase that is out of the reference range in the phase identification interval;

a set constructor configured to divide the phase identification interval into at least two subdivision intervals;

a minimum value selector configured to select the minimum clock phase value of each subdivision interval; and

an output controller configured to output the clock from which the clock phase that is out of the specified normal operation range is removed from each subdivision interval.

19. The apparatus of claim 12, wherein the clock corrector is further configured to determine whether the minimum clock phase value of each subdivision interval is included in a table comprising phase information enabling a normal operation of the second node and discard the minimum clock phase value that is not found in the table.

20. The apparatus of claim 19, wherein the table comprises clock phase information arranged by normal operation temperatures of the second node.

21. The apparatus of claim 12, wherein the clock corrector is further configured to replace the minimum clock phase value with an average minimum clock phase value when the minimum clock phase value is not found in the table.

22. The apparatus of claim 21, wherein the table comprises clock phase information arranged by normal operation temperatures of the second node.