Integrated circuit implementation and fault control system, device, and method

• US 8,473,069 B2
• Filed: 02/27/2009
• Issued: 06/25/2013
• Est. Priority Date: 02/28/2008
• Status: Active Grant

• Current Assignee: Proteus Digital Health, Inc. (Otsuka Holdings Company Limited)
• Original Assignee: Proteus Digital Health, Inc. (Otsuka Holdings Company Limited)
• Inventors: Bi, Yafei, Li, Haifeng, Zdeblick, Mark, Thompson, Todd, Leichner, Robert
• Primary Examiner(s): Heller, Tammie K
• Application Number:
  US12/920,086
• Publication Number:
  US 20110034964A1
• Time in Patent Office: 1,579 Days
• Field of Search: 607/5, 607/9, 607/30, 607/37, 607/63, 607/116
• US Class Current: 607/63
• CPC Class Codes: A61N 1/025 Digital circuitry features of electrotherapy devices, e.g. memory, clocks, processors
• CPC Class Codes: A61N 1/05 for implantation or insertion into the body, e.g. heart electrode A61N1/06 takes precedence
• CPC Class Codes: A61N 1/37 Monitoring; Protecting
• CPC Class Codes: A61N 1/378 Electrical supply

Abstract

Apparatus and methods enable robust, reliable control for implantable medical devices, including cardiac pacemakers, defibrillators and cardiac resynchronization devices. Integrated circuits in the devices have minimized interfaces, can derive power from the interface signals, and have high voltage and latch-up protection. A device lead has a power generation circuit and a switching circuit using cascaded PMOS transistors for operating with a stable voltage despite fluctuations in the supplied voltage. The lead has control electronics that provide a very low impedance between an electrode and a lead conductor during most of the duration of a pacing pulse, but during a brief initial portion of the pacing pulse, provide a very high impedance to permit charging up a power supply that is local to the control electronics. A method of stabilizing the external impedance and a system for fault detection and fault recovery for an implantable device are also provided.

Claims

1. An implantable system, comprising:

(a) a plurality of implantable integrated circuits, wherein each of the implantable integrated circuits is coupled to at least one lead line and wherein the each of the implantable integrated circuits is configured to derive electrical power from the and at least one lead line;

(b) a plurality of electrodes and sensors coupled to the plurality of implantable integrated circuits; and

(c) a controller communicatively coupled to the plurality of the implantable integrated circuits via the at least one lead line, the controller configured to;

detect a fault with an electronic component among the at least one lead line, the plurality of implantable integrated circuits, and the plurality of electrodes and sensors;

correct the fault with the electronic component using a recovery strategy comprising a virtual component replacement through component re-selection based on component performance profiles of the at least one lead line, the plurality of implantable integrated circuits, and the plurality of electrodes and sensors; and

update the component performance profiles and store the component performance profiles in a memory coupled to the controller.

2. The implantable system according to claim 1, further comprising protection circuitry for each of the implantable integrated circuits, the protection circuitry being activated when one of the at least one lead line is increased in voltage to greater than about 5.5 V.

3. The implantable system according to claim 2, wherein the protection circuitry comprises:

(a) a resistor divider network coupled to a first interface signal via a switch;

(b) a transistor coupled to a first supply, and controllable by a node of the resistor divider network; and

(c) a buffer configured to receive an output from the transistor, and to open the switch when the first interface signal is greater than a first predetermined level.

4. The implantable system according to claim 3, further comprising a second supply coupled to the resistor divider network, and a third supply configured to be a diode drop below the second supply.

5. The implantable system according to claim 1, wherein the at least one lead line is present in a lead.

6. The implantable system according to claim 1, the system further comprising:

an in-body computing system in communication with the controller; and

an external impedance stabilizer, the external impedance stabilizer having a configuration mode in which all of the plurality of electrodes and sensors are decoupled from the in-body computing system and an operating mode in which selected electrodes and sensors of the plurality of electrodes and sensors are coupled to the in-body computing system.

7. The implantable system according to claim 6, further comprising:

a circuit adapted to, while the external impedance stabilizer is in the configuration mode, configure the plurality of electrodes and sensors by selecting which electrode and sensor of the plurality of electrodes and sensors are to be coupled to the in-body computing system during the operating mode.

8. The implantable system according to claim 7, wherein, while the external impedance stabilizer is in the operating mode, the external impedance stabilizer decouples the circuit from the in-body computing system.

9. The implantable system according to claim 6, wherein the in-body computing system is selected from the group consisting of a cardiac pacemaker and an implantable cardiac defibrillator.

10. The implantable system according to claim 6, wherein the recovery strategy further comprises signal re-programming for at least one failed component, weighted selection of component replacement based on weighted failure probability and faultiness level, signal normalization for deteriorating sensor components, and circuit fault re-routing and isolation.

11. The implantable system according to claim 10, wherein the controller is configured to iteratively apply the recovery strategy until satisfactory operation of the implantable system is achieved.