Power delivery in a heterogeneous 3-D stacked apparatus

• US 8,473,762 B2
• Filed: 07/18/2012
• Issued: 06/25/2013
• Est. Priority Date: 11/23/2009
• Status: Active Grant

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Dennard, Robert H., Kursun, Eren
• Primary Examiner(s): Stoynov, Stefan
• Application Number:
  US13/552,091
• Publication Number:
  US 20120284541A1
• Time in Patent Office: 342 Days
• Field of Search: 713/300, 713/320, 713/324, 257/686, 257/691, 307/43, 323/318, 363/13, 703/18
• US Class Current: 713/300
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2225/06513 Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06517 Bump or bump-like direct electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06541 Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV] manufacturing via connections per se H01L21/76898
• CPC Class Codes: H01L 23/642 Capacitive arrangements H01L23/49589, H01L23/645, H01L23/647, H01L23/66 take precedence; capacitive effects between wiring layers on the semiconductor body H01L23/5222
• CPC Class Codes: H01L 25/0657 Stacked arrangements of devices
• CPC Class Codes: H01L 25/18 the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N

Abstract

A heterogeneous three-dimensional (3-D) stacked apparatus is provided that includes multiple layers arranged in a stacked configuration with a lower layer configured to receive a board-level voltage and one or more upper layers stacked above the lower layer. The heterogeneous 3-D stacked apparatus also includes multiple tiles per layer, where each tile is designed to receive a separately regulated voltage. The heterogeneous 3-D stacked apparatus additionally includes at least one layer in the one or more upper layers with voltage converters providing the separately regulated voltage converted from the board-level voltage.

Claims

1. A heterogeneous three-dimensional stacked apparatus comprising:

multiple layers arranged in a stacked configuration comprising a lower layer configured to receive a board-level voltage and one or more upper layers stacked above the lower layer;

multiple tiles per layer, wherein each tile is designed to receive a separately regulated voltage;

at least one layer in the one or more upper layers comprising voltage converters providing the separately regulated voltage converted from the board-level voltage; and

a three-dimensional power delivery controller configured to control electrical distribution between the board-level voltage and the voltage converters of the at least one layer as a function of one or more of;

supply voltage requirements, voltage conversion efficiencies, estimated IR drops, estimated tile temperatures, estimated current drawn, layer maximum power, and total maximum power for the heterogeneous three-dimensional stacked apparatus, wherein the three-dimensional power delivery controller selectively routes electrical power between the layers and the voltage converters, including disabling at least one of the voltage converters in response to exceeding one of a power and thermal limit.

2. The heterogeneous three-dimensional stacked apparatus of claim 1 wherein the one or more upper layers include a processor layer with processing circuitry distributed in multiple tiles of the processor layer with independently regulated supply voltages.

3. The heterogeneous three-dimensional stacked apparatus of claim 1 wherein a plurality of the voltage converters are interconnected in one of:

a tree, a column, and a mesh topology.

4. The heterogeneous three-dimensional stacked apparatus of claim 1 wherein one or more of the plurality of the voltage converters incorporate passive energy storage elements.

5. The heterogeneous three-dimensional stacked apparatus of claim 4 wherein the passive energy storage elements include one or more of:

deep trench capacitors and stacked capacitors fabricated in an embedded DRAM memory process.