Methods and systems of a flash memory controller and an error correction code (ECC) controller using variable-length segmented ECC data
First Claim
1. A flash memory controller, comprising:
- a flash memory interface controller;
a host interface controller;
an error correction code (ECC) encoder configured to receive information data from the host interface controller and generate first ECC data with variable lengths in response to the information data to be stored in a flash memory;
an ECC divider configured to divide each first ECC datum of the first ECC data into one or more ECC segments according to a respective length of each first ECC datum and forward the ECC segments to the flash memory interface controller, wherein each of the ECC segments is stored in different flash pages of a flash block through a pointer field pointing to a next ECC portion storing a next ECC segment;
an ECC constructor configured to receive one or more of the ECC segments from the flash memory interface controller and generate a second ECC datum by combining the received ECC segments for each of the information data read from the flash memory; and
an ECC decoder configured to correct errors of the information datum read from the flash memory based on the read information datum and the second ECC datum and forward the corrected read information datum to the host interface controller.
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Accused Products
Abstract
An ECC controller comprises an ECC encoder, an ECC divider, an ECC constructor and an ECC decoder. The ECC encoder is configured to generate ECC data with different lengths in response to information data to be stored into a flash memory. The ECC divider is configured to divide each ECC datum generated by the ECC encoder into one or more ECC segments according to the length of the ECC datum. The ECC constructor is configured to generate an ECC datum by combining one or more ECC segments for each information datum read from the flash memory. The ECC decoder is configured to correct the errors of the information data read from the flash memory device by using the ECC data generated by the ECC constructor.
104 Citations
34 Claims
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1. A flash memory controller, comprising:
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a flash memory interface controller; a host interface controller; an error correction code (ECC) encoder configured to receive information data from the host interface controller and generate first ECC data with variable lengths in response to the information data to be stored in a flash memory; an ECC divider configured to divide each first ECC datum of the first ECC data into one or more ECC segments according to a respective length of each first ECC datum and forward the ECC segments to the flash memory interface controller, wherein each of the ECC segments is stored in different flash pages of a flash block through a pointer field pointing to a next ECC portion storing a next ECC segment; an ECC constructor configured to receive one or more of the ECC segments from the flash memory interface controller and generate a second ECC datum by combining the received ECC segments for each of the information data read from the flash memory; and an ECC decoder configured to correct errors of the information datum read from the flash memory based on the read information datum and the second ECC datum and forward the corrected read information datum to the host interface controller. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 20)
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12. An error correction code (ECC) controller for a flash memory, comprising:
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an ECC encoder configured to generate first ECC data with variable lengths in response to information data to be stored in a flash memory; an ECC divider configured to divide each first ECC datum of the first ECC data into one or more ECC segments according to a respective length of each first ECC datum, wherein each of the ECC segments is stored in different flash pages of a flash block through a pointer field pointing to a next ECC portion storing a next ECC segment; an ECC constructor configured to generate a second ECC datum by combining one or more ECC segments for each information datum read from the flash memory; and an ECC decoder configured to correct errors of the information datum read from the flash memory by using the second ECC datum generated by the ECC constructor. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19)
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21. A method for encoding error correction code (ECC) data for information data to be stored in a flash memory, comprising:
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generating an ECC datum in response to an information datum to be stored in a flash memory; dividing the ECC datum into a plurality of ECC segments; storing the information datum to a flash page of a flash block of the flash memory; and storing the ECC segments to a plurality of flash pages of the flash block of the flash memory, wherein at least one ECC datum of the first ECC data is divided into the plurality of ECC segments which are stored in different flash pages of a flash block through a pointer field pointing to a next ECC portion storing a next ECC segment. - View Dependent Claims (22, 23, 24, 25, 26)
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27. A method for correcting errors of information data stored in a flash memory, comprising:
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reading an information datum stored in a flash memory; combining a plurality of ECC segments stored in the flash memory into an ECC datum corresponding to the information datum, wherein at least one ECC datum of the first ECC data is divided into the plurality of ECC segments which are stored in different flash pages of a flash block through a pointer field pointing to a next ECC portion storing a next ECC segment; and correcting errors of the information datum by decoding an ECC codeword formed by the information datum and the ECC datum. - View Dependent Claims (28, 29, 30, 31, 32, 33, 34)
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Specification