Semiconductor device and method of manufacturing the same

• US 8,476,719 B2
• Filed: 05/18/2011
• Issued: 07/02/2013
• Est. Priority Date: 05/21/2010
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Endo, Yuta, Sasaki, Toshinari, Noda, Kosei, Sato, Mizuho
• Primary Examiner(s): Nhu, David
• Application Number:
  US13/110,241
• Publication Number:
  US 20110284846A1
• Time in Patent Office: 776 Days
• Field of Search: 257/43, 257/55, 257/69, 257/192, 257/213, 257/347, 257/411, 257/412, 257/410, 257/E21.006, 257/E21.007, 257/E21.051, 257/E21.077, 257/E21.17, 257/E21.218, 257/E21.267, 257/E21.311, 257/E21.319, 257/E21.352
• US Class Current: 257/412
• CPC Class Codes: H01L 27/1225 with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
• CPC Class Codes: H01L 29/4908 for thin film semiconductor, e.g. gate of TFT
• CPC Class Codes: H01L 29/66969 of devices having semiconductor bodies not comprising group 14 or group 13/15 materials comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials, comprising cuprous oxide or cuprous iodide H01L21/02365
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/7869 having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

Oxygen is released from the insulating layer, whereby oxygen deficiency in the oxide semiconductor layer and an interface state between the insulating layer and the oxide semiconductor layer can be reduced. Accordingly, a semiconductor device where reliability is high and variation in electric characteristics is small can be manufactured.

Claims

1. A semiconductor device comprising:

a substrate;

a gate electrode;

an oxide semiconductor layer comprising indium and zinc;

a source electrode and a drain electrode electrically connected to the oxide semiconductor layer;

a first insulating layer between the gate electrode and the oxide semiconductor layer; and

a second insulating layer comprising a silicon peroxide radical,

wherein the oxide semiconductor layer is provided between the first insulating layer and the second insulating layer,

wherein the second insulating layer is in contact with the oxide semiconductor layer, and

wherein the oxide semiconductor layer is dehydrated or dehydrogenated.

2. The semiconductor device according to claim 1,

wherein the gate electrode overlaps with the oxide semiconductor layer with the first insulating layer interposed therebetween, and

wherein the oxide semiconductor layer is provided between the gate electrode and the substrate.

3. The semiconductor device according to claim 1, wherein the source electrode and the drain electrode are provided between the first insulating layer and the oxide semiconductor layer.

4. The semiconductor device according to claim 1, wherein the source electrode and the drain electrode are provided between the second insulating layer and the oxide semiconductor layer.

5. The semiconductor device according to claim 1,

wherein the oxide semiconductor layer overlaps with the gate electrode with the first insulating layer interposed therebetween, and

wherein the gate electrode is provided between the substrate and the oxide semiconductor layer.

6. The semiconductor device according to claim 1, wherein the first insulating layer comprises a silicon peroxide radical.

7. The semiconductor device according to claim 1,

wherein the oxide semiconductor layer comprises a channel region, a source region and a drain region, and

wherein the source region and the drain region have lower resistance than the channel region.

8. The semiconductor device according to claim 1, wherein the silicon peroxide radical comprises the structure represented by Si—

O—

O●

.

9. The semiconductor device according to claim 1, wherein the first insulating layer comprising the silicon peroxide radical has signals at g value=2.0016and 2.0078 in a spectrum obtained by an electron spin resonance method.

10. The semiconductor device according to claim 1, wherein a hydrogen concentration of the oxide semiconductor layer is lower than 1×

10¹⁸ cm<sup>−

3</sup>.

11. The semiconductor device according to claim 1, wherein a carrier concentration of the oxide semiconductor layer is lower than 1×

10¹⁴ cm<sup>−

3</sup>.

12. A semiconductor device comprising an insulating layer in contact with an oxide semiconductor layer,

wherein the oxide semiconductor layer comprises indium and zinc,

wherein the insulating layer comprises a silicon peroxide radical, and

wherein the oxide semiconductor layer is dehydrated or dehydrogenated.

13. The semiconductor device according to claim 12, wherein the silicon peroxide radical comprises the structure represented by Si—

O—

O●

.

14. The semiconductor device according to claim 12, wherein the insulating layer has signals at g value=2.0078 and 2.0016 in a spectrum obtained by an electron spin resonance method.

15. The semiconductor device according to claim 12, wherein a hydrogen concentration of the oxide semiconductor layer is lower than 1×

10¹⁸ cm<sup>−

3</sup>.

16. The semiconductor device according to claim 12, wherein a carrier concentration of the oxide semiconductor layer is lower than 1×

10¹⁴ cm<sup>−

3</sup>.